/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
!!Configuration
name: BOARD_BootClockRUN
called_from_default_init: true
outputs:
- {id: ADC0_CLK.outFreq, value: 160 MHz}
- {id: ADC1_CLK.outFreq, value: 160 MHz}
- {id: AIPS_PLAT_CLK.outFreq, value: 80 MHz}
- {id: AIPS_SLOW_CLK.outFreq, value: 40 MHz}
- {id: BCTU0_CLK.outFreq, value: 160 MHz}
- {id: CLKOUT_RUN_CLK.outFreq, value: 8 MHz}
- {id: CLKOUT_STANDBY_CLK.outFreq, value: 24 MHz}
- {id: CMP0_CLK.outFreq, value: 40 MHz}
- {id: CMP1_CLK.outFreq, value: 40 MHz}
- {id: CORE_CLK.outFreq, value: 160 MHz}
- {id: CRC0_CLK.outFreq, value: 80 MHz}
- {id: DCM0_CLK.outFreq, value: 40 MHz}
- {id: DCM_CLK.outFreq, value: 40 MHz}
- {id: DMAMUX0_CLK.outFreq, value: 160 MHz}
- {id: DMAMUX1_CLK.outFreq, value: 160 MHz}
- {id: EDMA0_CLK.outFreq, value: 160 MHz}
- {id: EDMA0_TCD0_CLK.outFreq, value: 160 MHz}
- {id: EDMA0_TCD10_CLK.outFreq, value: 160 MHz}
- {id: EDMA0_TCD11_CLK.outFreq, value: 160 MHz}
- {id: EDMA0_TCD1_CLK.outFreq, value: 160 MHz}
- {id: EDMA0_TCD2_CLK.outFreq, value: 160 MHz}
- {id: EDMA0_TCD3_CLK.outFreq, value: 160 MHz}
- {id: EDMA0_TCD4_CLK.outFreq, value: 160 MHz}
- {id: EDMA0_TCD5_CLK.outFreq, value: 160 MHz}
- {id: EDMA0_TCD6_CLK.outFreq, value: 160 MHz}
- {id: EDMA0_TCD7_CLK.outFreq, value: 160 MHz}
- {id: EDMA0_TCD8_CLK.outFreq, value: 160 MHz}
- {id: EDMA0_TCD9_CLK.outFreq, value: 160 MHz}
- {id: EIM0_CLK.outFreq, value: 40 MHz}
- {id: EMIOS0_CLK.outFreq, value: 160 MHz}
- {id: EMIOS1_CLK.outFreq, value: 160 MHz}
- {id: ERM0_CLK.outFreq, value: 40 MHz}
- {id: FIRCOUT.outFreq, value: 48 MHz}
- {id: FLASH0_CLK.outFreq, value: 40 MHz}
- {id: FLEXCAN0_CLK.outFreq, value: 24 MHz}
- {id: FLEXCAN1_CLK.outFreq, value: 24 MHz}
- {id: FLEXCAN2_CLK.outFreq, value: 24 MHz}
- {id: FLEXCAN3_CLK.outFreq, value: 24 MHz}
- {id: FLEXCAN4_CLK.outFreq, value: 24 MHz}
- {id: FLEXCAN5_CLK.outFreq, value: 24 MHz}
- {id: FLEXCANA_CLK.outFreq, value: 24 MHz}
- {id: FLEXCANB_CLK.outFreq, value: 24 MHz}
- {id: FLEXIO0_CLK.outFreq, value: 80 MHz}
- {id: FXOSCOUT.outFreq, value: 16 MHz}
- {id: HSE_CLK.outFreq, value: 80 MHz}
- {id: I3C0_CLK.outFreq, value: 40 MHz}
- {id: INTM_CLK.outFreq, value: 80 MHz}
- {id: LCU0_CLK.outFreq, value: 160 MHz}
- {id: LCU1_CLK.outFreq, value: 160 MHz}
- {id: LPI2C0_CLK.outFreq, value: 40 MHz}
- {id: LPI2C1_CLK.outFreq, value: 40 MHz}
- {id: LPSPI0_CLK.outFreq, value: 80 MHz}
- {id: LPSPI1_CLK.outFreq, value: 40 MHz}
- {id: LPSPI2_CLK.outFreq, value: 40 MHz}
- {id: LPSPI3_CLK.outFreq, value: 40 MHz}
- {id: LPUART0_CLK.outFreq, value: 80 MHz}
- {id: LPUART1_CLK.outFreq, value: 40 MHz}
- {id: LPUART2_CLK.outFreq, value: 40 MHz}
- {id: LPUART3_CLK.outFreq, value: 40 MHz}
- {id: LPUART4_CLK.outFreq, value: 40 MHz}
- {id: LPUART5_CLK.outFreq, value: 40 MHz}
- {id: LPUART6_CLK.outFreq, value: 40 MHz}
- {id: LPUART7_CLK.outFreq, value: 40 MHz}
- {id: MSCM_CLK.outFreq, value: 80 MHz}
- {id: PIT0_CLK.outFreq, value: 40 MHz}
- {id: PIT1_CLK.outFreq, value: 40 MHz}
- {id: PLL_PHI0.outFreq, value: 160 MHz}
- {id: PLL_PHI1.outFreq, value: 160 MHz}
- {id: RTC0_CLK.outFreq, value: 32.768 kHz}
- {id: RTC_CLK.outFreq, value: 32.768 kHz}
- {id: SIRCOUT.outFreq, value: 32 kHz}
- {id: SIUL0_CLK.outFreq, value: 40 MHz}
- {id: STCU0_CLK.outFreq, value: 40 MHz}
- {id: STM0_CLK.outFreq, value: 48 MHz}
- {id: STMA_CLK.outFreq, value: 48 MHz}
- {id: SWT0_CLK.outFreq, value: 40 MHz}
- {id: SXOSCOUT.outFreq, value: 32.768 kHz}
- {id: TCM_CM7_0_CLK.outFreq, value: 160 MHz}
- {id: TEMPSENSE_CLK.outFreq, value: 160 MHz}
- {id: TRACE_CLK.outFreq, value: 48 MHz}
- {id: TRGMUX0_CLK.outFreq, value: 40 MHz}
- {id: TSENSE0_CLK.outFreq, value: 40 MHz}
- {id: WKPU0_CLK.outFreq, value: 40 MHz}
settings:
- {id: CORE_MFD.scale, value: '120', locked: true}
- {id: CORE_PLLODIV_0_DE, value: Enabled}
- {id: CORE_PLLODIV_1_DE, value: Enabled}
- {id: CORE_PLL_PD, value: Power_up}
- {id: FXOSC_PM, value: Crystal_mode}
- {id: MC_CGM_MUX_0.sel, value: PHI0}
- {id: MC_CGM_MUX_0_DIV0.scale, value: '1', locked: true}
- {id: MC_CGM_MUX_0_DIV0_Trigger, value: Common}
- {id: MC_CGM_MUX_0_DIV1.scale, value: '2', locked: true}
- {id: MC_CGM_MUX_0_DIV1_Trigger, value: Common}
- {id: MC_CGM_MUX_0_DIV2.scale, value: '4', locked: true}
- {id: MC_CGM_MUX_0_DIV2_Trigger, value: Common}
- {id: MC_CGM_MUX_0_DIV3.scale, value: '2', locked: true}
- {id: MC_CGM_MUX_0_DIV3_Trigger, value: Common}
- {id: MC_CGM_MUX_0_DIV4.scale, value: '4', locked: true}
- {id: MC_CGM_MUX_0_DIV4_Trigger, value: Common}
- {id: MC_CGM_MUX_6.sel, value: N/A}
- {id: MC_CGM_MUX_6_DE0, value: Enabled}
- {id: MC_CGM_MUX_6_DIV0.scale, value: '2', locked: true}
- {id: MODULE_CLOCKS.MC_CGM_AUX3_DIV0.scale, value: '2', locked: true}
- {id: MODULE_CLOCKS.MC_CGM_AUX4_DIV0.scale, value: '2', locked: true}
- {id: PHI0.scale, value: '3', locked: true}
- {id: PHI1.scale, value: '3', locked: true}
- {id: PLL_PREDIV.scale, value: '2', locked: true}
- {id: POSTDIV.scale, value: '2', locked: true}
- {id: SXOSC_PM, value: Crystal_mode}
sources:
- {id: FXOSC_CLK.FXOSC_CLK.outFreq, value: 16 MHz, enabled: true}
- {id: SXOSC_CLK.SXOSC_CLK.outFreq, value: 32.768 kHz, enabled: true}
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
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车载嵌入式S32K312 DTCM 操作示例代码
共985个文件
o:36个
static-var:34个
su:34个
需积分: 5 10 下载量 29 浏览量
2023-11-02
18:16:33
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温馨提示
TCM是一种被直接集成在CPU芯片中的高速缓存,TCM又分为ITCM(Instruction TCM)和DTCM(Data TCM)。ITCM是用来存储代码段的,DTCM是用来存储数据的。 为什么要使用DTCM来存储数据?1)频繁存取的数据,放到DTCM中以节省存取时间;2)存放到DTCM的数据,不会占用RAM的空间。 在S32 Design Studio for S32 Platform 3.4的IDE中,如何编写代码,能够成功使用这个空间,示例代码。 S32K312 DTCM在代码中使用示例
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车载嵌入式S32K312 DTCM 操作示例代码 (985个子文件)
test.args 2KB
Clock_Ip_Cfg.args 1KB
main.args 1KB
Siul2_Port_Ip_Cfg.args 1KB
Clock_Ip.args 1KB
exceptions.args 1KB
Vector_Table.args 1021B
SchM_Port.c.019i.build_ssa_passes 42KB
Clock_Ip.c.019i.build_ssa_passes 28KB
Siul2_Port_Ip.c.019i.build_ssa_passes 19KB
Clock_Ip_Selector.c.019i.build_ssa_passes 18KB
Clock_Ip_Specific.c.019i.build_ssa_passes 13KB
Clock_Ip_Monitor.c.019i.build_ssa_passes 11KB
system.c.019i.build_ssa_passes 9KB
Clock_Ip_Divider.c.019i.build_ssa_passes 8KB
Clock_Ip_ExtOsc.c.019i.build_ssa_passes 7KB
Det_stub.c.019i.build_ssa_passes 7KB
Clock_Ip_Pll.c.019i.build_ssa_passes 5KB
Clock_Ip_Gate.c.019i.build_ssa_passes 5KB
Clock_Ip_ProgFreqSwitch.c.019i.build_ssa_passes 5KB
SchM_Mcu.c.019i.build_ssa_passes 5KB
Tspc_Port_Ip.c.019i.build_ssa_passes 4KB
Clock_Ip_DividerTrigger.c.019i.build_ssa_passes 3KB
OsIf_Timer.c.019i.build_ssa_passes 3KB
startup.c.019i.build_ssa_passes 3KB
Clock_Ip_IntOsc.c.019i.build_ssa_passes 2KB
Det.c.019i.build_ssa_passes 2KB
exceptions.c.019i.build_ssa_passes 1KB
main.c.019i.build_ssa_passes 1KB
OsIf_Timer_System_Internal_Systick.c.019i.build_ssa_passes 1KB
nvic.c.019i.build_ssa_passes 1KB
Clock_Ip_FracDiv.c.019i.build_ssa_passes 337B
Clock_Ip_Frequency.c.019i.build_ssa_passes 162B
Clock_Ip_Irq.c.019i.build_ssa_passes 141B
Clock_Ip_Cfg.c.019i.build_ssa_passes 0B
OsIf_Cfg.c.019i.build_ssa_passes 0B
Tspc_Port_Ip_Cfg.c.019i.build_ssa_passes 0B
Siul2_Port_Ip_Cfg.c.019i.build_ssa_passes 0B
Clock_Ip_Data.c.019i.build_ssa_passes 0B
OsIf_Timer_System.c.019i.build_ssa_passes 0B
OsIf_Interrupts.c.019i.build_ssa_passes 0B
Clock_Ip_Data.c 247KB
Clock_Ip_Frequency.c 109KB
SchM_Port.c 64KB
Clock_Ip.c 55KB
Clock_Ip_Cfg.c 40KB
Siul2_Port_Ip.c 37KB
system.c 33KB
Clock_Ip_Selector.c 25KB
Clock_Ip_Specific.c 24KB
Clock_Ip_Monitor.c 24KB
OsIf_Timer_System.c 22KB
SchM_Mcu.c 20KB
Clock_Ip_ExtOsc.c 17KB
Clock_Ip_Divider.c 14KB
OsIf_Timer.c 14KB
Clock_Ip_Pll.c 13KB
Det.c 13KB
Clock_Ip_ProgFreqSwitch.c 13KB
Clock_Ip_Gate.c 12KB
Clock_Ip_IntOsc.c 11KB
Clock_Ip_DividerTrigger.c 11KB
OsIf_Timer_System_Internal_Systick.c 10KB
Det_stub.c 10KB
Tspc_Port_Ip.c 9KB
Clock_Ip_FracDiv.c 8KB
OsIf_Interrupts.c 8KB
Clock_Ip_Irq.c 7KB
Siul2_Port_Ip_Cfg.c 7KB
Tspc_Port_Ip_Cfg.c 7KB
nvic.c 6KB
OsIf_Cfg.c 6KB
exceptions.c 6KB
startup.c 5KB
main.c 2KB
SchM_Port.c.000i.cgraph 322KB
Clock_Ip.c.000i.cgraph 159KB
Clock_Ip_Selector.c.000i.cgraph 71KB
Clock_Ip_Monitor.c.000i.cgraph 57KB
Clock_Ip_Specific.c.000i.cgraph 54KB
Clock_Ip_ExtOsc.c.000i.cgraph 47KB
Clock_Ip_Data.c.000i.cgraph 47KB
Siul2_Port_Ip.c.000i.cgraph 45KB
Det_stub.c.000i.cgraph 41KB
SchM_Mcu.c.000i.cgraph 36KB
Clock_Ip_Gate.c.000i.cgraph 36KB
Clock_Ip_Pll.c.000i.cgraph 34KB
system.c.000i.cgraph 32KB
Clock_Ip_Divider.c.000i.cgraph 31KB
Det.c.000i.cgraph 28KB
Clock_Ip_DividerTrigger.c.000i.cgraph 21KB
Clock_Ip_IntOsc.c.000i.cgraph 20KB
Clock_Ip_ProgFreqSwitch.c.000i.cgraph 18KB
exceptions.c.000i.cgraph 15KB
Tspc_Port_Ip.c.000i.cgraph 14KB
OsIf_Timer.c.000i.cgraph 13KB
main.c.000i.cgraph 12KB
Clock_Ip_FracDiv.c.000i.cgraph 7KB
nvic.c.000i.cgraph 6KB
OsIf_Timer_System_Internal_Systick.c.000i.cgraph 6KB
共 985 条
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