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General Description
The MAX9286 Gigabit multimedia serial link (GMSL)
deserializer receives data from up to four GMSL serial-
izers over 50Ω coax or 100Ω shielded twisted pair (STP)
cables and output data on four CSI-2 lanes. Each serial
link has an embedded control channel operating from
9.6kbps to 1Mbps in UART-UART, UART-I
2
C, and I
2
C-I
2
C
mode. Using the control channel, a µC can program the
serializers, deserializer, and peripheral device registers at
any time, independent of video timing. A maskable broad-
cast write speeds programming of image sensor registers.
For use with longer cables, the deserializer has a pro-
grammable cable equalizer and programmable error
detection and correction. The serial input meets ISO
10605 and IEC 61000-4-2 ESD standards. The core sup-
ply is 1.7V to 1.9V and the I/O supply is 1.7V to 3.6V.
The device is available in lead(Pb)-free, 56-pin, 8mm x
8mm QFND and TQFN packages with exposed pad and
0.5mm lead pitch.
Applications
● Surround View Camera Systems
● Machine Vision Systems
● 3D Camera Systems
Benets and Features
● Ideal for Multicamera Stream Applications
• Works with Low-Cost 50Ω Coax Cable and FAKRA
Connectors or 100Ω STP
• Data from Image Sensors Are Synchronized to the
Same Pixel
• Automatic Internal/External Generation of Camera
Sync
• Equalization Allows 15m Length Cable Operation
at Full Speed
● Multiple Input/Output Features for System Flexibility
• 1 to 4 Lane CSI-2 Output with 80Mbps to
1200Mbps Per Lane
• Swappable/Selectable Serial Input/Output with
Swappable Polarity
• 9.6kbps to 1Mbps Control Channel in UART,
Mixed UART/I
2
C, or I
2
C Mode with Clock Stretch
Capability
● Peripheral Features for System Power-Up and
Verification
• Built-In PRBS Tester for BER Testing of the
Serial Link
• Programmable Choice of Nine Default Device
Addresses
• Two Dedicated GPIO Ports
• High-Immunity Mode for Maximum Control-
Channel Noise Rejection
● Meets Rigorous Automotive and Industrial
Requirements
• -40°C to +105°C Operating Temperature
• ±8kV Contact, ±20kV Air ISO 10605 and ±8kV
Contact, ±12kV EC 61000-4-2 ESD Protection
Ordering Information appears at end of data sheet.
19-7456; Rev 0; 1/15
MAX9286 Quad 1.5Gbps GMSL Deserializer with Coax
or STP Input and CSI-2 Output
Maxim Confidential. Provided to Beijing Wojianzhuo Tech under NDA
MAX9286 Quad 1.5Gbps GMSL Deserializer with Coax
or STP Input and CSI-2 Output
www.maximintegrated.com
Maxim Integrated
│
2
TABLE OF CONTENTS
General Description ............................................................................ 1
Applications
.................................................................................. 1
Features and Benefits
.......................................................................... 1
Absolute Maximum Ratings
...................................................................... 7
Package Thermal Characteristics
................................................................. 7
DC Electrical Characteristics
..................................................................... 7
AC Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Typical Operating Characteristics
................................................................ 15
Pin Configuration
............................................................................. 17
Pin Description
............................................................................... 17
Functional Diagram
........................................................................... 19
Detailed Description
........................................................................... 25
Register Mapping
...........................................................................25
Frame Combination
..........................................................................26
Serial Link Signaling and Data Format
...........................................................26
Maximum Input/Output Data Rate
..............................................................30
Data Formats and Configuration
................................................................30
Supported Data Rates
.......................................................................47
Reverse Control Channel
.....................................................................47
Control Channel and Register Programming
......................................................47
UART Interface
.............................................................................48
Interfacing Command-Byte-Only I
2
C Devices with UART .........................................50
UART Bypass Mode
......................................................................50
I
2
C Interface ...............................................................................50
START and STOP Conditions
...............................................................51
Bit Transfer
..............................................................................51
Acknowledge
............................................................................51
Slave Address
...........................................................................52
Bus Reset
...............................................................................52
Format for Writing
........................................................................52
Format for Reading
.......................................................................53
I
2
C Communication with Remote Side Devices .................................................53
UART/I
2
C Device Address Translation...........................................................53
Line Equalizers
.............................................................................54
HS/DE Tracking
.............................................................................54
Cable Type Configuration
.....................................................................54
High-Immunity Reverse Control Channel Mode
...................................................54
Sleep Mode
................................................................................55
Maxim Confidential. Provided to Beijing Wojianzhuo Tech under NDA
MAX9286 Quad 1.5Gbps GMSL Deserializer with Coax
or STP Input and CSI-2 Output
www.maximintegrated.com
Maxim Integrated
│
3
TABLE OF CONTENTS (CONTINUED)
Power-Down Mode ..........................................................................55
Frame Sync
................................................................................55
Internal Frame Sync (FSYNCMODE = 0X)
.....................................................55
External Frame Sync (FSYNCMODE = 1X)
.......................................................55
GPO/GPI Control
...........................................................................55
Configuration Link
...........................................................................55
Link Masking
...............................................................................55
Link Startup Procedure
........................................................................ 56
Applications Information
........................................................................ 58
Self-PRBS Test
.............................................................................58
Error Checking
.............................................................................58
ERR Output
................................................................................58
Auto Error Reset
............................................................................58
Changing the Clock Frequency
.................................................................59
Software Programming of the Device Addresses
...................................................59
3-Level Configuration Inputs
...................................................................59
Configuration Blocking
.......................................................................59
Compatibility with Other GMSL Devices
.........................................................59
HS/VS Inversion
............................................................................59
GPIOs
....................................................................................59
Internal Input Pulldowns
......................................................................59
Choosing I
2
C/UART Pullup Resistors ...........................................................60
AC-Coupling
...............................................................................60
Selection of AC-Coupling Capacitors
............................................................60
Selection of Camera Frequency References
......................................................60
Power-Supply Circuits and Bypassing
...........................................................60
Cables and Connectors
......................................................................61
Board Layout
...............................................................................61
ESD Protection
.............................................................................61
Typical Application Circuit
...................................................................... 82
Ordering Information
.......................................................................... 82
Chip Information
.............................................................................. 82
Package Information
.......................................................................... 82
Revision History
.............................................................................. 83
Maxim Confidential. Provided to Beijing Wojianzhuo Tech under NDA
MAX9286 Quad 1.5Gbps GMSL Deserializer with Coax
or STP Input and CSI-2 Output
www.maximintegrated.com
Maxim Integrated
│
4
LIST OF FIGURES
Figure 1. Reverse Control Channel Output Parameters ............................................... 20
Figure 2. Test Circuit for Differential Input Measurement
.............................................. 20
Figure 3. Test Circuit for Single-Ended Input Measurement
............................................ 20
Figure 4. Line Fault
........................................................................... 21
Figure 5. Worst-Case Pattern Output
............................................................. 22
Figure 6. I
2
C Timing Parameters ................................................................. 22
Figure 7. Deserializer Delay
..................................................................... 23
Figure 8. GPI-to-GPO Delay
.................................................................... 23
Figure 9. Lock and Camera Sync Time
............................................................ 23
Figure 10. Power-Up Delay
..................................................................... 24
Figure 11. MIPI Output Timing Parameters
......................................................... 24
Figure 12. Frame Combination
.................................................................. 26
Figure 13. 24-Bit Mode Serial Data Format
......................................................... 27
Figure 14. 32-Bit Mode Serial Data Format
......................................................... 28
Figure 15. 27-Bit High-Bandwidth Mode Serial Data Format
........................................... 29
Figure 16. RAW8 Input Map
..................................................................... 31
Figure 17. RAW10 Input Map
.................................................................... 32
Figure 18. RAW11x2 Input Map
.................................................................. 33
Figure 19. RAW12 Input Map
.................................................................... 34
Figure 20. RAW12x2 Input Map
.................................................................. 35
Figure 21. RAW14 Input Map
.................................................................... 36
Figure 22. RAW16 Input Map
.................................................................... 37
Figure 23. RAW20 Input Map
................................................................... 38
Figure 24. YUV8 Input Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
Figure 25. YUV10 Input Map
.................................................................... 40
Maxim Confidential. Provided to Beijing Wojianzhuo Tech under NDA
MAX9286 Quad 1.5Gbps GMSL Deserializer with Coax
or STP Input and CSI-2 Output
www.maximintegrated.com
Maxim Integrated
│
5
LIST OF FIGURES (CONTINUED)
Figure 26. YUV12 Input Map .....................................................................41
Figure 27. RGB565 Input Map
................................................................... 42
Figure 28. RGB666 Input Map
................................................................... 43
Figure 29. RGB888 Input Map
................................................................... 44
Figure 30. User-Defined 8-Bit Input Map
........................................................... 45
Figure 31. User-Defined 24-Bit Input Map
.......................................................... 46
Figure 32. GMSL UART Protocol for Base Mode
.................................................... 48
Figure 33. GMSL UART Data Format for Base Mode
................................................. 49
Figure 34. Sync Byte (0x79)
..................................................................... 49
Figure 36. Format Conversion Between GMSL UART and I
2
C with Register Address (I2CMETHOD = 0)........ 49
Figure 35. ACK Byte (0xC3)
..................................................................... 49
Figure 37. Format Conversion Between GMSL UART and I
2
C Without Register Address (I2CMETHOD = 1) ..... 50
Figure 38. START and STOP Conditions
.......................................................... 51
Figure 39. Bit Transfer
......................................................................... 51
Figure 40. Acknowledge
........................................................................ 51
Figure 41. Slave Address
....................................................................... 52
Figure 42. Format for I
2
C write .................................................................. 52
Figure 43. Format for I
2
C Write to Multiple Registers ................................................. 52
Figure 44. Format for I
2
C Read .................................................................. 53
Figure 45. Example Frame Sync Operation (Automatic Mode)
.......................................... 56
Figure 46. State Diagram
....................................................................... 58
Figure 47. Human Body Model ESD Test Circuit
..................................................... 61
Figure 49. ISO 10605 Contact Discharge ESD Test Circuit
............................................ 61
Figure 48. IEC 61000-4-2 Contact Discharge ESD Test Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
Maxim Confidential. Provided to Beijing Wojianzhuo Tech under NDA
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- weixin_416106872019-06-26很实用,谢谢分享
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