SGMIISpecification1.8_SGMII资源-CSDN文库

SGMII

5星 · 超过95%的资源需积分: 48 103 浏览量 2018-05-12 20:58:47 上传评论 5 收藏 137KB PDF 举报

资源推荐

资源详情

资源评论

1 of 11 N ov e m b e r 2 , 2 0 0 5

Document Number ENG-46158

Revision Revision 1.8

Author Yi-Chin Chu

Project Manager JR Rivers

Serial-GMII Specification

The Serial Gigabit Media Independent Interface (SGMII) is designed to satisfy the following

requirements:

• Convey network data and port speed between a 10/100/1000 PHY and a MAC with

significantly less signal pins than required for GMII.

• Operate in both half and full duplex and at all port speeds.

Change History

D ef initions

MII – Media Independent Interface: A digital interface that provides a 4-bit wide datapath

between a 10/100 Mbit/s PHY and a MAC sublayer. Since MII is a subset of GMII, in this

document, we will use the term “GMII” to cover all of the specification regarding the MII

interface.

Revision Date Description

1.8 April 27, 2005 Add shim to the PHY transmit datapath to suppress TX_ER when TX_EN

is not asserted

1.7 July 20, 20001 Clarify data sampling and also the possible loss of the first byte of pream-

ble.

1.6 Jan 4, 20001 Added specifications for Cisco Systems Intellectual Property.

1.5 Aug 4, 2000 Specified the data pattern for the beginning of the frame (preamble, SFD)

for the frames sent from the PHY to make the PCS layer work properly.

1.4 June 30, 2000 Took out Jabber info, changed tx_Config_Reg[0] from 0 to 1 to make Auto-

Negotiation work

1.3 April 17, 2000 Increased allowable input and output common mode range. The output high

and low voltages were also increased appropriately. Added specification for

output over/undershoot. Added note about AC coupling and clock recovery.

1.2 Feb 8, 2000 Added timing budget analysis and reduced LVDS input threshold to +/- 50

mV.

1.1 Nov 10, 1999 Incoporated Auto-Negotiation Process for update of link status

1.0 Oct. 14, 1999 Initial Release

3 of 11 N ov e m b e r 2 , 2 0 0 5

Ov erv iew

SGMII uses two data signals and two clock signals to convey frame data and link rate

information between a 10/100/1000 PHY and an Ethernet MAC. The data signals operate at

1.25 Gbaud and the clocks operate at 625 MHz (a DDR interface). Due to the speed of

operation, each of these signals is realized as a differential pair thus providing signal integrity

while minimizing system noise.

Figure 1 illustrates the simple connections in a system utilizing SGMII.

The transmit and receive data paths leverage the 1000BASE-SX PCS defined in the IEEE

802.3z specification (clause 36). The traditional GMII data signals (TXD/RXD), data valid

signals (TX_EN/RX_DV), and error signals (TX_ER/RX_ER) are encoded, serialized and

output with the appropriate DDR clocking. Thus it is a 1.25 Gbaud interface with a 625 MHz

clock. Carrier Sense (CRS) is derived/inferred from RX_DV, and collision (COL) is logically

derived in the MAC when RX_DV and TX_EN are simultaneously asserted. There is a small

block in the PHY transmit path to suppress TX_ER in full duplex mode when TX_EN is not

asserted.

Control information, as specified in Table 1, is transferred from the PHY to the MAC to signal

the change of the control information. This is achieved by using the Auto-Negotiation

functionality defined in Clause 37 of the IEEE Specification 802.3z. Instead of the ability

advertisement, the PHY sends the control information via its tx_config_Reg[15:0] as specified

in Table 1 whenever the control information changes. Upon receiving control information, the

MAC acknowledges the update of the control information by asserting bit 14 of its

tx_config_reg{15:0] as specified in Table 1.

SGMII details source synchronous clocking; however, specific implementations may desire to

recover clock from the data rather than use the supplied clock. This operation is allowed;

however, all sources of data must generate the appropriate clock regardless of how they clock

receive data.

RXCLK

TXCLK

PHYM A C

CRS

COL

RX_CK

RX_DV

RX_ER

RXD[7:0]

GTX_CLK

TX_CLK

TX_EN

TX_ER

TXD[7:0]

802.3z

Transmit

PCS

802.3z

Receive

PCS

802.3z

Synch

COL

RX_CLK

RX_DV

RX_ER

RXD[7:0]

GTX_CLK

TX_CLK

TX_EN

TX_ER

TXD[7:0]

CRS

802.3z

Synch

802.3z

Transmit

PCS

802.3z

Receive

PCS

F i g u r e 1 S G M I I C on n e c t i v i t y

802.3z Auto-Negotiation

* TX_ER Suppression

剩余10页未读，继续阅读

评论收藏

内容反馈

yyung

2019-09-15

谢谢分享！
qiaokuangyi

2021-04-22

谢谢分享。
G-P-Z

2019-09-29

谢谢分享，是真实的资料。

lipuxx

粉丝: 3
资源: 22

SGMII Specification 1.8

最新资源

SGMII Specification 1.8

SGMII specification

SGMII Specification

SGMII Specification V1.8

SGMIISpecification.pdf

SGMII Serial-GMII Specification

SGMII.pdf

QSGMII协议详解.pdf

The Serial Gigabit Media Independent Interface (SGMII)

k7 sgmii 千兆ip核 例化

Word 2003: Rich Text Format (RTF) Specification, version 1.8

Cisco QSGMII Specification.pdf

8313 sgmii

sgmii.rar_SGMII_sgmii

88E1512配置SGMII to 1000BASE-T模式.docx

88E1512网卡SGMII千兆网驱动(支持热插拔).pdf

基于ZYNQ的88E1111的RGMII to SGMII + BCM5396的网络通讯功能 （含uboot与kernel的修改

基于88E1512的SGMII接口千兆网驱动的应用经验.pdf

1000BASE-X_SGMII_GMII_RGMII_MII_1000BASE-T接口定义.docx

基于ZYNQ的PL端扩展SGMII网口（PS控制）调试经验.pdf

sgmii_latest[1].tar.gz_SGMII接口_sgmii_sgmii_latest_sgmii_latest.t

MII+GMII+RGMII+SGMII 解密

MXL_SRDS_SGMII_1P.pdf

100Base-T1_SFP_SGMII_Converter, Technica Engineering, BMW宝马10年以太网服务商

解决Win 10与不兼容VirtualBox操作过程文档+（附带软件）.zip

计算机网络知识点总结(谢希仁第八版).pdf

Xshell软件(配色方案&amp;高亮关键字/突出显示集)的相关文件

湖南科技大学《计算机网络》配套课件（PDF版）

《计算机网络自顶向下方法第7版》中文PDF+复习题问题中文版答案

计算机网络自顶向下方法第八版答案

最新资源

k7 sgmii 千兆ip核例化

基于ZYNQ的88E1111的RGMII to SGMII + BCM5396的网络通讯功能（含uboot与kernel的修改

Xshell软件(配色方案&高亮关键字/突出显示集)的相关文件