Wishbone sd-card controller ip core
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2014-09-17
19:51:31
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SD-card-controller-master.zip （76个子文件） 
SD-card-controller-master sw example 
.project 763B src sdc_example.c 3KB mmc.h 8KB ocsdc.c 8KB mmc.c 18KB .cproject 14KB .gitignore 15B sim rtl_sim run Makefile 24B bin gui_startup.do 21B ramdisk2.hex 12KB vcd_startup.do 54B Makefile 6KB
wb_memory.txt 825KB cli_startup.do 13B FLASH.txt 8KB bench verilog sd_cmd_serial_host_tb.sv 8KB sd_data_serial_host_tb.sv 24KB wb_model_defines.h 7KB wb_master32.v 13KB sd_controller_top_tb.sv 25KB byte_en_reg_tb.sv 5KB wb_slave_behavioral.v 12KB edge_detect_tb.sv 4KB wb_master_behavioral.v 23KB sd_controller_wb_tb.sv 11KB sd_cmd_master_tb.sv 11KB sd_wb_sel_ctrl_tb.sv 8KB bistable_domain_cross_tb.sv 4KB wb_bus_mon.v 18KB sdModel.v 25KB sd_data_master_tb.sv 11KB sd_fifo_filler_tb.sv 9KB monostable_domain_cross_tb.sv 5KB sd_data_xfer_trig_tb.sv 6KB syn quartus run Makefile 24B src sdc_controller_top.v 6KB bin constraints.sdc 288B Makefile 6KB pin_assignments.tcl 1B doc references 
partA2_300.pdf 632KB part1_410.pdf 1.88MB partE1_300.pdf 394KB src usage.tex 9KB hdl_if.tex 12KB sw_if.tex 19KB introduction.tex 4KB ip_core_if.odg 12KB ip_core.odg 12KB Makefile 3KB specification.tex 4KB events.odg 11KB .gitignore 45B Wishbone SD Card Controller IP Specification.pdf 243KB bin 
ip_core_if.png 31KB ip_core.png 30KB events.png 25KB README.md 2KB rtl verilog generic_fifo_dc_gray.v 9KB sd_data_xfer_trig.v 5KB sd_cmd_serial_host.v 11KB sd_fifo_filler.v 6KB sd_data_master.v 9KB sd_crc_7.v 1KB bistable_domain_cross.v 4KB sd_crc_16.v 2KB monostable_domain_cross.v 4KB sd_controller_wb.v 9KB sdc_controller.v 18KB sd_cmd_master.v 9KB sd_wb_sel_ctrl.v 5KB sd_data_serial_host.v 15KB sd_defines.h 4KB generic_dpram.v 12KB edge_detect.v 3KB sd_clock_divider.v 4KB byte_en_reg.v 4KB
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