ANSI/ESDA/JEDEC JS-002-2018
Limited revision of ANSI/ESDA/JEDEC JS-002-2014
For Electrostatic Discharge
Sensitivity Testing
Charged Device Model (CDM) -
Device Level
Electrostatic Discharge Association
7900 Turin Road, Bldg. 3
Rome, NY 13440
JEDEC Solid State Technology Association
3103 North 10th Street
Arlington, VA 22201
An American National Standard
Approved December 17, 2018
ANSI/ESDA/JEDEC JS-002-2018
ESDA/JEDEC Joint Standard for
Electrostatic Discharge Sensitivity Testing -
Charged Device Model (CDM) -
Device Level
Approved February 16, 2018
EOS/ESD Association, Inc. & JEDEC Solid State Technology Association
ANSI/ESDA/JEDEC JS-002-2018
Electrostatic Discharge Association (ESDA) standards and publications are designed to serve the
public interest by eliminating misunderstandings between manufacturers and purchasers, facilitating
the interchangeability and improvement of products and assisting the purchaser in selecting and
obtaining the proper product for his particular needs. The existence of such standards and publications
shall not in any respect preclude any member or non-member of the Association from manufacturing
or selling products not conforming to such standards and publications. Nor shall the fact that a standard
or publication is published by the Association preclude its voluntary use by non-members of the
Association whether the document is to be used either domestically or internationally. Recommended
standards and publications are adopted by the ESDA in accordance with the ANSI Patent policy.
Interpretation of ESDA Standards: The interpretation of standards in-so-far as it may relate to a specific
product or manufacturer is a proper matter for the individual company concerned and cannot be
undertaken by any person acting for the ESDA. The ESDA Standards Chairman may make comments
limited to an explanation or clarification of the technical language or provisions in a standard, but not
related to its application to specific products and manufacturers. No other person is authorized to
comment on behalf of the ESDA on any ESDA Standard.
THE CONTENTS OF ESDA’S STANDARDS AND PUBLICATIONS ARE PROVIDED “AS-
IS,” AND ESDA MAKES NO REPRESENTATIONS OR WARRANTIES, EXPRESSED OR
IMPLIED, OF ANY KIND WITH RESPECT TO SUCH CONTENTS. ESDA DISCLAIMS
ALL REPRESENTATIONS AND WARRANTIES, INCLUDING WITHOUT LIMITATION,
WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR
USE, TITLE AND NON-INFRINGEMENT.
ESDA STANDARDS AND PUBLICATIONS ARE CONSIDERED TECHNICALLY SOUND
AT THE TIME THEY ARE APPROVED FOR PUBLICATION. THEY ARE NOT A
SUBSTITUTE FOR A PRODUCT SELLER’S OR USER’S OWN JUDGEMENT WITH
RESPECT TO ANY PARTICULAR PRODUCT DISCUSSED, AND ESDA DOES NOT
UNDERTAKE TO GUARANTEE THE PERFORMANCE OF ANY INDIVIDUAL
MANUFACTURERS’ PRODUCTS BY VIRTUE OF SUCH STANDARDS OR
PUBLICATIONS. THUS, ESDA EXPRESSLY DISLAIMS ANY RESPONSIBILITY FOR
DAMAGES ARISING FROM THE USE, APPLICATION, OR RELIANCE BY OTHERS ON
THE INFORMATION CONTAINED IN THESE STANDARDS OR PUBLICATIONS.
NEITHER ESDA, NOR ITS FORMER AND PRESENT MEMBERS, OFFICERS,
EMPLOYEES OR OTHER REPRESENTATIVES WILL BE LIABLE FOR DAMAGES
ARISING OUT OF, OR IN CONNECTION WITH, THE USE OR MISUSE OF ESDA
STANDARDS OR PUBLICATIONS, EVEN IF ADVISED OF THE POSSIBILITY
THEREOF. THIS IS A COMPREHENSIVE LIMITATION OF LIABILITY THAT APPLIES
TO ALL DAMAGES OF ANY KIND, INCLUDING WITHOUT LIMITATION, LOSS OF
DATA, INCOME OR PROFIT, LOSS OF OR DAMAGE TO PROPERTY AND CLAIMS OF
THIRD PARTIES.
Published by:
Electrostatic Discharge Association
7900 Turin Road, Bldg. 3
Rome, NY 13440
JEDEC Solid State Technology Association
3103 North 10th Street
Arlington, VA 22201
Copyright © 2018 by EOS/ESD Association, Inc. and JEDEC Solid State Technology Association
All rights reserved
No part of this publication may be reproduced in any form, in
an electronic retrieval system or otherwise, without the prior
written permission of the publisher.
Printed in the United States of America
ISBN: 1-58537-298-6
CAUTION
NOTICE
DISCLAIMER OF
WARRANTIES
DISCLAIMER OF
GUARANTY
LIMITATION ON
ESDA’s LIABILITY
ANSI/ESDA/JEDEC JS-002-2018
i
(This foreword is not part of ESDA/JEDEC Joint Standard ANSI/ESDA/JEDEC JS-002-2018)
FOREWORD
This joint standard
1
was developed under the guidance of the JEDEC JC-14.1 Committee on
Reliability Test Methods for Packaged Devices and the ESDA Standards Committee. The content
was developed by a joint working group composed of both ESDA and JEDEC. The new standard
is intended to replace the existing charged device model ESD standards (JESD22-C101 and
ANSI/ESD S5.3.1). It contains the essential elements from both standards.
The earliest electrostatic discharge (ESD) test models and standards simulate a charged object
approaching a device and discharging through the device. The most common example is the
human body model (HBM). However, with the increasing use of automated device handling
systems another potentially destructive discharge mechanism, the charged device model (CDM)
becomes increasingly important. In the CDM a device itself becomes charged (e.g., by sliding on a
surface (tribocharging) or by electric field induction) and is rapidly discharged (by an ESD event)
as it closely approaches a conductive object. A critical feature of the CDM is the metal-metal
discharge which results in a very rapid transfer of charge through an air breakdown arc. The CDM
test method also simulates metal-metal discharges arising from other similar scenarios, such as
the discharging of charged metal objects to devices at different potential.
Accurately quantifying and reproducing this fast metal-metal discharge event is very difficult, if not
impossible, due to the limitations of the measuring equipment and its influence on the discharge
event. The CDM discharge is generally completed in a few nanoseconds, and peak currents of tens
of amperes have been observed. The peak current into the device will vary considerably depending
on a large number of factors, including package type and parasitics. The typical failure mechanism
observed in MOS devices for the CDM model is dielectric damage, although other damage has
been noted.
It has been shown that CDM damage susceptibility correlates better to peak current levels than
charge voltage. It has also been shown that the CDM charge voltage sensitivity of a given device
is package dependent. For example, the same integrated circuit (IC) in a small area package may
be less susceptible to CDM damage at a given voltage, compared to that same IC in a package of
the same type with a larger area. In fact, a new Section 7.5 and Normative Annex C address small
package CDM and outlines the procedure to characterize small packages (by technology / common
ESD design to those in larger packages, capacitance measurement) such that CDM testing for
those small packages may not be needed.
This joint standard is a first collaborative result of combining the different CDM platform and
measurement devices of both ESDA and JEDEC standards into a single platform standard
document. It aims to optimize use of test systems currently in the field, while improving the
waveform measurement capability in determining calibrated waveform parameters to maintain the
JEDEC legacy data for use in today’s systems. The key combining principle employed in this joint
document is the use of current instead of voltage to define test conditions. While CDM voltages will
still be reported, the underlying tester verification method uses discharge currents from the JEDEC
calibration modules. This is the critical feature that allows the combination of the two former
methods into one while maintaining connection to the vast majority of legacy CDM threshold data.
More description of the current-based test condition approach is given in Annex C of the document.
During development of this joint standard it was discovered (from waveform measurements using
high bandwidth oscilloscopes) that additional ferrites (or other high frequency response
modifications to the CDM test head) to meet JEDEC waveform compliance with a 1 GHz
oscilloscope were being implemented in existing systems. This resulted in distortion of the actual
discharge waveform. This standard now prohibits use of these components. Removal of ferrites in
existing test heads or replacement of existing test heads with ferrite free versions, are both
1
ESD Association Standard (S): A precise statement of a set of requirements to be satisfied by a material,
product, system or process that also specifies the procedures for determining whether each of the
requirements is satisfied.
ANSI/ESDA/JEDEC JS-002-2018
ii
straightforward modifications to ensure ANSI/ESDA/JEDEC JS-002 compliance. Additionally, initial
CDM tester qualification using a high bandwidth oscilloscope is now required to ensure compliance.
This is a living document and further improvements in hardware, metrology and test procedure
based on this platform are anticipated to be described in future revisions.
This standard is maintained and revised as a joint standard through a memorandum of
understanding between JEDEC and ESDA. This standard is a living document and revisions and
updates will be made on a routine basis driven by the needs of the electronic industry.
For Technical Information Contact:
EOS/ESD Association, Inc.
7900 Turin Road, Bldg. 3
Rome, NY 13440
Phone (315) 339-6937
www.esda.org
JEDEC Solid State Technology Association
3103 North 10th Street, Suite 204 South
Arlington, VA 22201-2107
Phone (703) 907-7559
Fax (703) 907-7583
www.jedec.org
