library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
use ieee.std_logic_arith.all;
entity taxi is ---实体定义
port(
clk_750k:in std_logic;
start:in std_logic;
stop:in std_logic;
sensor:in std_logic;
pay3,pay2,pay1,pay0:out std_logic_vector(3 downto 0);
km1,km0:out std_logic_vector(3 downto 0);
time1,time0:out std_logic_vector(3 downto 0));
end taxi;
architecture behav of taxi is ---结构体定义
signal f_20,f_10,f_1:std_logic; ----分频后频率为20Hz,10Hz,1Hz,对应2元,1元,0.1元
signal q_20:integer range 0 to 38399;
signal q_10:integer range 0 to 76799;
signal q_1:integer range 0 to 767999;
signal s:integer range 0 to 59;
signal p3,p2,p1,p0:std_logic_vector(3 downto 0); ----对应价格的百位,十位,个位,小数后一位
signal k1,k0:std_logic_vector(3 downto 0); ----对应公里数的十位,个位
signal m1:std_logic_vector(2 downto 0); -----对应等待时间的十位
signal m0:std_logic_vector(3 downto 0); -----对应等待时间的个位
signal en1,en0,f:std_logic; ---
begin
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