©LAMSIM Enterprises Inc.
3
Split Planes and What Happens When
Microstrip Signals Cross Them
When discussing signal integrity (SI) issues there is always a great debate when signals on one
layer of a printed circuit board (PCB) crossing over split or a slot in the reference planes on an
adjacent layer. On the one hand, some argue that crossing a split plane should never be done
because of the increased risk in crosstalk and possible failure to pass electromagnetic
compatibility (EMC) compliance. On the other hand, others stressed that if the width of the gap
and power/ground layers in the stackup were engineered carefully, this may not be as big of an
issue. So who’s right?
Well, like all things involving signal integrity, the answer is, “it depends”. And the best way to
answer “it depends” is to put in the numbers. This white paper attempts to dispel some of the
myths about signals crossing split planes.
To start off with let us look at a typical 4 layer PCB ~ 62 mils thick with a stackup shown in
Figure 1. The outer two layers are microstrip signal layers and the inner two layers are power and
ground. The trace widths are 7 mils wide with 8 mil separation. When driven differentially the
impedance is ~100 ohms; and when driven signal-ended (SE), the impedance is ~ 56 ohms.
Figure 1 Simple 4 layer PCB stackup
It is common nowadays to have multiple power rails in modern designs. On a 4-layer board this
means the power layer, more often than not, will be split up and as a result, traces crossing splits
or slots on adjacent reference planes are often unavoidable.
Let’s assume we have a pair of traces on the top layer crossing a 50 mil gap on the adjacent layer
as shown in Figure 2. The cross-section of the microstrip sections before and after the gap sees
the dielectric thickness (H1) from the top layer to the power reference plane. Because the gap
