Atmel Pof2jed Version 4.45 Jan 10 2005
Copyright 1998 Atmel Corporation. All Rights Reserved.
EPM7128SLC84-15 --> 1508asPLCC84
Input file : D:\lsx\clock.pof
Output file : D:\lsx\clock.jed
Conversion Report file : D:\lsx\clock.txt
Conversion is completed
Options : (1508 only)
Powerdown : OFF
Security Bit : AUTO
Slew Rate : AUTO
PinClk : OFF
Race Coverage : ON
Pin Keeper : OFF
Macrocell Low Power: AUTO
Power Reset : ALWAYS
ITD on GCLK1 : ON
ITD on GCLK2 : ON
ITD on GCLK3 : ON
Open Collector : AUTO
JTAG mode : AUTO
TDI Pullup : OFF
TMS Pullup : OFF
FPGA实现时钟显示（Verilog HDL语言）
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2009-07-30
19:35:28
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收藏 285KB RAR 举报 
.rar （90个子文件） 
时钟显示 
clock.asm.rpt 6KB clock.fit.rpt 225KB clock.fit.eqn 52KB clock.map.summary 246B clock.pin 13KB clock.sof 137KB clock.tan.summary 1KB clock.tan.rpt 69KB clock.qpf 903B db clock.pre_map.cdb 7KB clock.(14).cnf.cdb 5KB clock.(11).cnf.cdb 2KB clock.sgdiff.hdb 24KB clock.tan.qmsg 21KB clock.(3).cnf.cdb 5KB clock.sgdiff.cdb 8KB clock.(1).cnf.hdb 667B clock.cbx.xml 283B clock.eco.cdb 141B clock.(0).cnf.hdb 2KB clock.(15).cnf.cdb 523B clock.fit.qmsg 2KB clock.(2).cnf.cdb 2KB clock.(1).cnf.cdb 2KB clock.hier_info 3KB clock.cmp0.ddb 9KB clock.(13).cnf.cdb 777B clock.(13).cnf.hdb 498B clock.rtlv_sg_swap.cdb 158B clock.(5).cnf.cdb 907B clock.syn_hier_info 0B clock.cmp.rdb 18KB clock.(6).cnf.hdb 1KB clock.(3).cnf.hdb 1KB clock.(8).cnf.hdb 414B clock.sld_design_entry.sci 134B clock.(6).cnf.cdb 5KB clock.rtlv_sg.cdb 7KB clock.(12).cnf.hdb 498B clock.map.hdb 10KB clock.pre_map.hdb 8KB clock.(9).cnf.hdb 408B clock.(14).cnf.hdb 1KB clock.(11).cnf.hdb 690B add_sub_3kh.tdf 2KB clock.cmp.cdb 28KB add_sub_5ph.tdf 3KB add_sub_4ph.tdf 3KB clock.map.qmsg 18KB clock.hif 17KB clock.psp 0B clock.rtlv.hdb 8KB clock.(8).cnf.cdb 612B clock.(5).cnf.hdb 518B clock.(4).cnf.cdb 905B clock.map.cdb 11KB clock.cmp.qrpt 0B clock.(4).cnf.hdb 518B clock.(0).cnf.cdb 10KB clock.db_info 136B clock.(10).cnf.cdb 1KB clock.(12).cnf.cdb 779B clock.sld_design_entry_dsc.sci 134B clock.(7).cnf.cdb 700B clock.cmp.tdb 19KB clock.dbp 0B clock.(9).cnf.cdb 455B clock.(7).cnf.hdb 420B add_sub_snh.tdf 3KB clock.(15).cnf.hdb 413B clock.cmp.hdb 10KB add_sub_rnh.tdf 3KB clock.(2).cnf.hdb 787B clock.asm.qmsg 1KB clock.(10).cnf.hdb 623B clock.map.eqn 51KB
clock.txt 669B clock.flow.rpt 3KB clock.qsf 2KB clock.qws 655B clock.done 26B clock.vhd 8KB clock.fit.smsg 411B clock.dpf 121B page.txt 0B clock.pof 8KB clock.map.rpt 34KB clock.jed 71KB jtag.log 92B clock.fit.summary 310B资源评论
商菁华2013-12-16不是verilog写的 不过写的还算不错
coldplum3032012-11-21不是verilog语言写的，是vhdl写的，quartus软件
