AD5625R数据手册_AD5665代码资源-CSDN文库

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### AD5625R 数据手册关键知识点解析 #### 一、概述 AD5625R 是一款来自 Analog Devices 的高性能四通道数模转换器（DAC），属于 nanoDAC® 家族的一部分。该器件提供了多种精度选项（12位、14位、16位），并且集成了高精度的片上参考电压源。AD5625R 系列包括 AD5625R、AD5645R 和 AD5665R，以及不带片上参考的 AD5625 和 AD5665。这些器件支持 I²C 兼容的串行接口，并且能够在单电源供电下工作，电压范围为 2.7V 至 5.5V。 #### 二、特性详解 - **低功耗与小型封装**：AD5625R 系列采用了最小的引脚兼容封装，使其成为便携式电池供电设备的理想选择。 - **多精度选项**：提供 12 位、14 位和 16 位 DAC 版本，以满足不同应用的需求。 - **集成参考电压源**： - **AD5625R/AD5645R/AD5665R**：带有片上 2.5V 参考电压源，温度系数为 5ppm/°C，在 TSSOP 封装中；在 LFCSP 封装中提供 2.5V 或 1.25V 参考电压源，温度系数为 10ppm/°C。 - **AD5625/AD5665**：仅支持外部参考电压源。 - **宽电源电压范围**：能够在 2.7V 至 5.5V 之间的单电源供电下工作。 - **设计保证单调性**：确保在整个输入码范围内输出电压单调增加或减少。 - **复位功能**：具有上电复位至零刻度或中间刻度的功能。 - **通道级功耗降低**：可通过软件控制单独关闭每个 DAC 通道以降低功耗。 - **硬件 LDAC 和 CLR 功能**：支持硬件级别的锁存数据加载（LDAC）和清零（CLR）功能。 - **I²C 兼容串行接口**：支持标准模式（100kHz）、快速模式（400kHz）和高速模式（3.4MHz）。 #### 三、封装类型 - **10 针 LFCSP**（Lead Frame Chip Scale Package）：适用于空间受限的应用场景。 - **14 针 TSSOP**（Thin Small Outline Package）：提供了更大的安装灵活性。 #### 四、应用场景 - **过程控制**：如自动化生产线中的传感器信号调整和校准。 - **数据采集系统**：用于模拟信号的数字化处理。 - **便携式电池供电仪器**：例如手持式测量工具、移动医疗设备等。 - **数字增益和偏移调整**：在精密测量设备中用于校正信号。 - **可编程电压和电流源**：实现对各种电子系统的精确控制。 - **可编程衰减器**：用于无线通信系统中的信号强度控制。 #### 五、一般描述 AD5625R/AD5645R/AD5665R 和 AD5625/AD5665 系列 DAC 均采用单电源供电，支持 I²C 兼容串行接口。其中 AD5625R/AD5645R/AD5665R 集成了片上参考电压源，而 AD5625/AD5665 则需要外部参考电压源。这些器件在设计时已经考虑到了单调性的保证，从而确保了输出的准确性。此外，还提供了多种封装选项以适应不同的应用环境。 AD5625R 系列 DAC 在设计上兼顾了性能与实用性，是工业控制、数据采集以及其他需要高精度数模转换的应用场合的理想选择。

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Quad, 12-/14-/16-Bit nanoDACs with

5 ppm/°C On-Chip Reference, I

C Interface

AD5625R/AD5645R/AD5665R, AD5625/AD5665

Rev. B

Information furnished by Analog Devices is believed to be accurate and reliable. However, no

responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other

rights of third parties that may result from its use. Specifications subject to change without notice. No

license is granted by implication or otherwise under any patent or patent rights of Analog Devices.

Trademarks and registered trademarks are the property of their respective owners.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Tel: 781.329.4700 www.analog.com

FEATURES

Low power, smallest pin-compatible, quad nanoDACs

AD5625R/AD5645R/AD5665R

12-/14-/16-bit nanoDACs

On-chip, 2.5 V, 5 ppm/°C reference in TSSOP

On-chip, 2.5 V, 10 ppm/°C reference in LFCSP

On-chip, 1.25 V, 10 ppm/°C reference in LFCSP

AD5625/AD5665

12-/16-bit nanoDACs

External reference only

3 mm × 3 mm 10-lead LFCSP and 14-lead TSSOP

2.7 V to 5.5 V power supply

Guaranteed monotonic by design

Power-on reset to zero scale/midscale

Per channel power-down

Hardware

LDAC

and

CLR

functions

C-compatible serial interface supports standard (100 kHz),

fast (400 kHz), and high speed (3.4 MHz) modes

APPLICATIONS

Process control

Data acquisition systems

Portable battery-powered instruments

Digital gain and offset adjustment

Programmable voltage and current sources

Programmable attenuators

GENERAL DESCRIPTION

The AD5625R/AD5645R/AD5665R and AD5625/AD5665

members of the nanoDAC® family are low power, quad, 12-/

14-/16-bit, buffered voltage-out DACs with/without an on-chip

reference. All devices operate from a single 2.7 V to 5.5 V supply,

are guaranteed monotonic by design, and have an I

C-compatible

serial interface.

The AD5625R/AD5645R/AD5665R have an on-chip reference.

The LFCSP versions of the AD56x5R have a 1.25 V or 2.5 V,

10 ppm/°C reference, giving a full-scale output range of 2.5 V or

5 V; the TSSOP versions of the AD56x5R have a 2.5 V, 5 ppm/°C

reference, giving a full-scale output range of 5 V. The on-chip

reference is off at power-up, allowing the use of an external

reference. The internal reference is enabled via a software write.

The AD5625/AD5665 require an external reference voltage to

set the output range of the DAC.

The part incorporates a power-on reset circuit that ensures that

the DAC output powers up to 0 V (POR = GND) or midscale

(POR = V

) and remains there until a valid write occurs. The

on-chip precision output amplifier enables rail-to-rail output swing.

FUNCTIONAL BLOCK DIAGRAMS

INTERFACE

LOGIC

SDA

SCL

DDR1

DDR2

GND

1.25V/2.5V REF

REFIN

REFOUT

AD5625R/AD5645R/AD5665R

INPUT

DAC

STRING

DAC A

OUT

BUFFER

LDAC CLR POR

INPUT

DAC

STRING

DAC B

OUT

BUFFER

INPUT

DAC

STRING

DAC C

OUT

BUFFER

INPUT

DAC

STRING

DAC D

OUT

BUFFER

NOTES

1. THE FOLLOWING PINS ARE AVAILABLE ONLY ON 14-LEAD PACKAGE:

ADDR2, LDAC, CLR, POR.

06341-001

POWER-ON RESET POWER-DOWN LOGIC

Figure 1. AD5625R/AD5645R/AD5665R

6341-002

INTERFACE

LOGIC

SDA

SCL

ADDR1

ADDR2

GND

REFIN

AD5625/AD5665

INPUT

DAC

STRING

DAC A

OUT

BUFFER

LDAC CLR POR

INPUT

DAC

STRING

DAC B

OUT

BUFFER

INPUT

DAC

STRING

DAC C

OUT

BUFFER

INPUT

DAC

STRING

DAC D

OUT

BUFFER

NOTES

1. THE FOLLOWING PINS ARE AVAILABLE ONLY ON 14-LEAD PACKAGE:

ADDR2, LDAC, CLR, POR.

POWER-ON RESET POWER-DOWN LOGIC

Figure 2. AD5625/AD5665

The AD56x5R/AD56x5 use a 2-wire I

C-compatible serial

interface that operates in standard (100 kHz), fast (400 kHz),

and high speed (3.4 MHz) modes.

Table 1. Related Devices

Part No. Description

AD5025/AD5045/AD5065 Dual 12-/14-/16-bit DACs

AD5624R/AD5644R/AD5664R,

AD5624/AD5664

Quad SPI 12-/14-/16-bit DACs,

with/without internal reference

AD5627R/AD5647R/AD5667R,

AD5627/AD5667

Dual I

C 12-/14-/16-bit DACs,

with/without internal reference

AD5666

Quad SPI 16-bit DAC with

internal reference

AD5625R/AD5645R/AD5665R, AD5625/AD5665

Rev. B | Page 2 of 36

TABLE OF CONTENTS

Features .............................................................................................. 1

Applications ....................................................................................... 1

General Description ......................................................................... 1

Functional Block Diagrams ............................................................. 1

Revision History ............................................................................... 2

Specifications ..................................................................................... 3 

Specifications—AD5665R/AD5645R/AD5625R ..................... 3

Specifications—AD5665/AD5625 ............................................. 5

AC Characteristics ........................................................................ 7

C Timing Specifications ............................................................ 8

Absolute Maximum Ratings .......................................................... 10

ESD Caution ................................................................................ 10

Pin Configurations and Function Descriptions ......................... 11

Typical Performance Characteristics ........................................... 12

Terminology .................................................................................... 20

Theory of Operation ...................................................................... 22

Digital-to-Analog Converter (DAC) ....................................... 22

Resistor String ............................................................................. 22

Output Amplifier ........................................................................ 22

Internal Reference ...................................................................... 22

External Reference ..................................................................... 23

Serial Interface ............................................................................ 23

Write Operation.......................................................................... 23

Read Operation........................................................................... 23

High Speed Mode ....................................................................... 25

Input Shift Register .................................................................... 25

Multiple Byte Operation ............................................................ 25

Broadcast Mode .......................................................................... 27

LDAC

Function .......................................................................... 27

Power-Down Modes .................................................................. 29

Power-On Reset and Software Reset ....................................... 30

Internal Reference Setup (R Versions) .................................... 30

Applications Information .............................................................. 31

Using a Reference as a Power Supply for the

AD56x5R/AD56x5 ..................................................................... 31



Bipolar Operation Using the AD56x5R/AD56x5 .................. 31

Power Supply Bypassing and Grounding ................................ 31

Outline Dimensions ....................................................................... 32

Ordering Guide .......................................................................... 33

REVISION HISTORY

12/09—Rev. A to Rev. B

Changes to Features Section, General Description Section,

and Table 1 ......................................................................................... 1

Changes to Table 2 ............................................................................ 3

Changes to Internal Reference Section ........................................ 22

Updated Outline Dimensions ....................................................... 32

Changes to Ordering Guide .......................................................... 33

6/09—Rev. 0 to Rev. A

Changes to Features and General Description Sections .............. 1

Changes to Table 2 ............................................................................ 3

Changes to Table 3 ............................................................................ 5

Changes to Digital-to-Analog Converter (DAC) Section, Added

Figure 54 and Figure 55, Renumbered Subsequent Figures ..... 22

Changes to Ordering Guide .......................................................... 33

3/07—Revision 0: Initial Version

AD5625R/AD5645R/AD5665R, AD5625/AD5665

Rev. B | Page 3 of 36

SPECIFICATIONS

SPECIFICATIONS—AD5665R/AD5645R/AD5625R

= 2.7 V to 5.5 V; R

= 2 kΩ to GND; C

= 200 pF to GND; V

REFIN

= V

; all specifications T

MIN

to T

MAX

, unless otherwise noted.

Table 2.

A Grade B Grade

Parameter Min Typ Max Min Typ Max Unit Test Conditions/Comments

STATIC PERFORMANCE

AD5665R

Resolution 16 Bits

Relative Accuracy ±8 ±16 LSB

Differential Nonlinearity ±1 LSB Guaranteed monotonic by design

AD5645R

Resolution 14 Bits

Relative Accuracy ±2 ±4 LSB

Differential Nonlinearity ±0.5 LSB Guaranteed monotonic by design

AD5625R

Resolution 12 12 Bits

Relative Accuracy ±1 ±4 ±0.5 ±1 LSB

Differential Nonlinearity ±1 ±0.25 LSB Guaranteed monotonic by design

Zero-Code Error 2 10 2 10 mV All 0s loaded to DAC register

Offset Error ±1 ±10 ±1 ±10 mV

Full-Scale Error −0.1 ±0.5 −0.1 ±0.5 % FSR All 1s loaded to DAC register

Gain Error ±0.1 ±1.25 ±0.1 ±1 % FSR

Zero-Code Error Drift ±2 ±2 µV/°C

Gain Temperature Coefficient ±2.5 ±2.5 ppm Of FSR/°C

DC Power Supply Rejection

Ratio

−100 −100 dB DAC code = midscale; V

= 5 V ± 10%

DC Crosstalk (External

Reference)

15 15 µV

Due to full-scale output change,

= 2 kΩ to GND or V

10 10 µV/mA Due to load current change

8 8 µV Due to powering down (per channel)

DC Crosstalk (Internal

Reference)

25 25 µV

Due to full-scale output change,

= 2 kΩ to GND or V

20 20 µV/mA Due to load current change

10 10 µV Due to powering down (per channel)

OUTPUT CHARACTERISTICS

Output Voltage Range 0 V

0 V

V Internal reference disabled

2 ×

REF

2 ×

REF

Internal reference enabled

Capacitive Load Stability 2 2 nF R

= ∞

10 10 nF R

= 2 kΩ

DC Output Impedance 0.5 0.5 Ω

Short-Circuit Current 30 30 mA V

= 5 V

Power-Up Time 4 4 µs

Coming out of power-down mode;

= 5 V

REFERENCE INPUTS

Reference Current 210 260 210 260 µA V

REF

= V

= 5.5 V

Reference Input Range 0.75 V

0.75 V

Reference Input Impedance 26 26 kΩ

REFERENCE OUTPUT (1.25 V)

Output Voltage 1.247 1.253 1.247 1.253 V At ambient

Reference TC

±10 ±10 ppm/°C

Output Impedance 7.5 7.5 kΩ

AD5625R/AD5645R/AD5665R, AD5625/AD5665

Rev. B | Page 4 of 36

A Grade B Grade

Parameter Min Typ Max Min Typ Max Unit Test Conditions/Comments

REFERENCE OUTPUT (2.5 V) V

= 4.5 V to 5.5 V

Output Voltage 2.495 2.505 2.495 2.505 V At ambient

Reference TC

±10 ±5 ±10 ppm/°C

Output Impedance 7.5 7.5 kΩ

LOGIC INPUTS (ADDRx, CLR,

LDAC

, POR)

, Input Current ±1 ±1 μA

INL

, Input Low Voltage 0.15 × V

0.15 × V

INH

, Input High Voltage 0.85 × V

0.85 × V

, Pin Capacitance 2 2 pF

HYST

, Input Hysteresis 0.1 × V

0.1 × V

LOGIC INPUTS (SDA, SCL)

, Input Current ±1 ±1 μA

INL

, Input Low Voltage 0.3 × V

0.3 × V

INH

, Input High Voltage 0.7 × V

0.7 × V

, Pin Capacitance 2 2 pF

HYST

, Input Hysteresis 0.1 × V

0.1 × V

V High speed mode

0.05 × V

V Fast mode

LOGIC OUTPUTS (SDA)

, Output Low Voltage 0.4 0.4 V I

SINK

= 3 mA

0.6 0.6 V I

SINK

= 6 mA

Floating-State Leakage

Current

±1 ±1 μA

Floating-State Output

Capacitance

2 2 pF

POWER REQUIREMENTS

2.7 5.5 2.7 5.5 V

(Normal Mode)

= V

, V

= GND, full-scale loaded

= 4.5 V to 5.5 V 1.0 1.16 1.0 1.16 mA Internal reference off

= 2.7 V to 3.6 V 0.9 1.05 0.9 1.05 mA Internal reference off

= 4.5 V to 5.5 V 1.9 2.14 1.9 2.14 mA Internal reference on

= 2.7 V to 3.6 V 1.4 1.59 1.4 1.59 mA Internal reference on

(All Power-Down Modes)

= 2.7 V to 5.5 V 0.48 1 0.48 1 μA V

= V

, V

= GND (LFCSP)

= 3.6 V to 5.5 V 0.48 1 0.48 1 μA V

= V

, V

= GND (TSSOP)

Temperature range of A and B grades is −40°C to +105°C.

Linearity calculated using a reduced code range: AD5665R (Code 512 to Code 65,024), AD5645R (Code 128 to Code 16,256), AD5625R (Code 32 to Code 4064). Output

unloaded.

Guaranteed by design and characterization; not production tested.

Interface inactive. All DACs active. DAC outputs unloaded.

All DACs powered down. Power-down function is not available on 14-lead TSSOP parts when the part is powered with V

< 3.6 V.

AD5625R/AD5645R/AD5665R, AD5625/AD5665

Rev. B | Page 5 of 36

SPECIFICATIONS—AD5665/AD5625

= 2.7 V to 5.5 V; R

= 2 kΩ to GND; C

= 200 pF to GND; V

REFIN

= V

; all specifications T

MIN

to T

MAX

, unless otherwise noted.

Table 3.

B Grade

Parameter Min Typ Max Unit Test Conditions/Comments

STATIC PERFORMANCE

AD5665

Resolution 16 Bits

Relative Accuracy ±8 ±16 LSB

Differential Nonlinearity ±1 LSB Guaranteed monotonic by design

AD5625

Resolution 12 Bits

Relative Accuracy ±0.5 ±1 LSB

Differential Nonlinearity ±0.25 LSB Guaranteed monotonic by design

Zero-Code Error 2 10 mV All 0s loaded to DAC register

Offset Error ±1 ±10 mV

Full-Scale Error −0.1 ±0.5 % FSR All 1s loaded to DAC register

Gain Error ±0.1 ±1 % FSR

Zero-Code Error Drift ±2 µV/°C

Gain Temperature Coefficient ±2.5 ppm Of FSR/°C

DC Power Supply Rejection Ratio −100 dB DAC code = midscale; V

= 5 V ± 10%

DC Crosstalk (External Reference) 15 µV

Due to full-scale output change,

= 2 kΩ to GND or V

10 µV/mA Due to load current change

8 µV Due to powering down (per channel)

DC Crosstalk (Internal Reference) 25 µV

Due to full-scale output change,

= 2 kΩ to GND or V

20 µV/mA Due to load current change

10 µV Due to powering down (per channel)

OUTPUT CHARACTERISTICS

Output Voltage Range 0 V

Capacitive Load Stability 2 nF R

= ∞

10 nF R

= 2 kΩ

DC Output Impedance 0.5 Ω

Short-Circuit Current 30 mA V

= 5 V

Power-Up Time 4 µs Coming out of power-down mode; V

= 5 V

REFERENCE INPUTS

Reference Current 210 260 µA V

REF

= V

= 5.5 V

Reference Input Range 0.75 V

Reference Input Impedance 26 kΩ

LOGIC INPUTS (ADDRx, CLR, LDAC, POR)

, Input Current ±1 µA

INL

, Input Low Voltage 0.15 × V

INH

, Input High Voltage 0.85 × V

, Pin Capacitance 2 pF

HYST

, Input Hysteresis 0.1 × V

LOGIC INPUTS (SDA, SCL)

, Input Current ±1 µA

INL

, Input Low Voltage 0.3 × V

INH

, Input High Voltage 0.7 × V

, Pin Capacitance 2 pF

HYST

, Input Hysteresis 0.1 × V

V High speed mode

0.05 × V

V Fast mode

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