IMX6UL数据手册(商用级)资源-CSDN文库

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Package Information

Plastic Package

BGA 14 x 14 mm, 0.8 mm pitch

BGA 9 x 9 mm, 0.5 mm pitch

Ordering Information

See Table 1 on page 3

NXP Semiconductors

Data Sheet: Technical Data

Document Number: IMX6ULCEC

Rev. 2.2, 05/2017

1 i.MX 6UltraLite introduction

The i.MX 6UltraLite is a high performance, ultra

efficient processor family featuring NXP’s advanced

implementation of the single ARM Cortex

-A7 core,

which operates at speeds up to 528 MHz. The i.MX

6UltraLite includes an integrated power management

module that reduces the complexity of the external

power supply and simplifies the power sequencing. Each

processor in this family provides various memory

interfaces, including LPDDR2, DDR3, DDR3L, Raw

and Managed NAND flash, NOR flash, eMMC, Quad

SPI, and a wide range of other interfaces for connecting

peripherals, such as WLAN, Bluetooth™, GPS,

displays, and camera sensors.

The i.MX 6UltraLite is specifically useful for

applications such as:

• Electronics Point-of-Sale device

• Telematics

i.MX 6UltraLite

Applications Processors

for Consumer Products

1. i.MX 6UltraLite introduction . . . . . . . . . . . . . . . . . . . . . . . 1

1.1. Ordering information . . . . . . . . . . . . . . . . . . . . . . . 3

1.2. Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

2. Architectural overview . . . . . . . . . . . . . . . . . . . . . . . . . . 10

2.1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

3. Modules List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

3.1. Special signal considerations . . . . . . . . . . . . . . . 17

3.2. Recommended connections for unused analog

interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

4. Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . 20

4.1. Chip-level conditions . . . . . . . . . . . . . . . . . . . . . . 20

4.2. Power supplies requirements and restrictions . . . 28

4.3. Integrated LDO voltage regulator parameters . . . 29

4.4. PLL’s electrical characteristics . . . . . . . . . . . . . . . 31

4.5. On-Chip oscillators . . . . . . . . . . . . . . . . . . . . . . . 32

4.6. I/O DC parameters . . . . . . . . . . . . . . . . . . . . . . . 33

4.7. I/O AC parameters . . . . . . . . . . . . . . . . . . . . . . . . 37

4.8. Output buffer impedance parameters . . . . . . . . . 40

4.9. System modules timing . . . . . . . . . . . . . . . . . . . . 43

4.10. Multi-Mode DDR Controller (MMDC) . . . . . . . . . . 53

4.12. External peripheral interface parameters . . . . . . 62

4.13. A/D converter . . . . . . . . . . . . . . . . . . . . . . . . . . . 90

5. Boot mode configuration . . . . . . . . . . . . . . . . . . . . . . . . 95

5.1. Boot mode configuration pins . . . . . . . . . . . . . . . 95

5.2. Boot device interface allocation . . . . . . . . . . . . . . 96

6. Package information and contact assignments . . . . . . 103

6.1. 14x14 mm package information . . . . . . . . . . . . 103

6.2. 9x9 mm package information . . . . . . . . . . . . . . 116

6.3. GPIO reset behaviors during reset . . . . . . . . . . 129

7. Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 131

i.MX 6UltraLite Applications Processors for Consumer Products, Rev. 2.2, 05/2017

2 NXP Semiconductors

i.MX 6UltraLite introduction

• IoT Gateway

• Access control panels

• Human Machine Interfaces (HMI)

• Smart appliances

The features of the i.MX 6UltraLite processor include

• Single-core ARM Cortex-A7—The single core A7 provides a cost-effective and power-efficient

solution.

• Multilevel memory system—The multilevel memory system of each device is based on the L1

instruction and data caches, L2 cache, and internal and external memory. The device supports

many types of external memory devices, including DDR3, low voltage DDR3, LPDDR2, NOR

Flash, NAND Flash (MLC and SLC), OneNAND™, Quad SPI, and managed NAND, including

eMMC up to rev 4.4/4.41/4.5.

• Smart speed technology—Power management implemented throughout the IC that enables

multimedia features and peripherals to consume minimum power in both active and various low

power modes.

• Dynamic voltage and frequency scaling—The processor improves the power efficiency by scaling

the voltage and frequency to optimize performance.

• Multimedia powerhouse—Multimedia performance is enhanced by a multilevel cache system,

NEON™ MPE (Media Processor Engine) co-processor, a programmable smart DMA (SDMA)

controller, an asynchronous audio sample rate converter, and a Pixel processing pipeline (PXP) to

support 2D image processing, including color-space conversion, scaling, alpha-blending, and

rotation.

• Ethernet interfaces—10/100 Mbps Ethernet controllers.

• Human-machine interface—Support digital parallel display interface.

• Interface flexibility—Each processor supports connections to a variety of interfaces: High-speed

USB on-the-go with PHY, multiple expansion card port (high-speed MMC/SDIO host and other),

12-bit ADC module, CAN port, smart card interface compatible with EMV Standard v4.3, and a

variety of other popular interfaces (such as UART, I

C, and I

S serial audio).

• Advanced security—The processor delivers hardware-enabled security features that enable secure

e-commerce, digital rights management (DRM), information encryption, secure boot, and secure

software downloads. The security features are discussed in detail in the i.MX 6UltraLite Security

Reference Manual (IMX6ULSRM).

• Integrated power management—The processor integrates linear regulators and internally generate

voltage levels for different domains. This significantly simplifies system power management

structure.

For a comprehensive list of the i.MX 6UltraLite features, see Section 1.2, “Features"”.

1. The actual feature set depends on the part numbers as described in the Ta b le 1 and Table 2.

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