FLI32626H-BG DIGITAL VIDEO PROCESSOR / DUAL-CHANNEL LCD TV CONTROLLER DATASHEET
P/N C32626-DAT-01F STMicroelectronics CONFIDENTIAL Page 5 of 99
CONTENT—Subject to Change
TABLE OF CONTENTS
1 Introduction ......................................................................................... 12
1.1 Applications ..................................................................................................12
1.2 FLI32626H System Design Example .................................................................13
1.3 FLI32626H Features .......................................................................................14
2 FLI32626H Ball Out .............................................................................. 15
3 FLI32626H Ball List .............................................................................. 17
4 Bootstrap Configuration ....................................................................... 30
5 Functional Description .......................................................................... 31
5.1 Clock Generation ...........................................................................................32
5.1.1 Using the Internal Oscillator with an External Crystal ..................................................32
5.2 Hardware Reset .............................................................................................34
5.3 Software Reset ..............................................................................................35
5.4 Analog Front End (AFE) ..................................................................................35
5.4.1 21-Channel Analog Input Multiplexer .........................................................................36
5.4.2 Input Filtering - SD and HD Path ..............................................................................36
5.4.3 ADC .....................................................................................................................36
5.4.4 AFE Ball Connection ................................................................................................37
5.4.5 Digital Processing after AFE–Digital Front End ............................................................39
5.4.6 Automatic Gain Control (AGC) ..................................................................................39
5.5 Multi-Standard Video Decoder .........................................................................39
5.5.1 Automated Format Detection ...................................................................................40
5.5.2 Y/C Seperation .......................................................................................................40
5.5.3 Macrovision Input Support .......................................................................................40
5.5.4 CKILL Support .......................................................................................................40
5.5.5 IF Compensation Support ........................................................................................40
5.5.6 Direct SCART Input Support .....................................................................................40
5.6 Multi-Standard VBI Data Processing .................................................................41
5.6.1 VBI Slicer ..............................................................................................................41
5.6.2 VBI Data Processing ...............................................................................................42
5.6.3 Wide Screen Signaling (WSS) ...................................................................................42
5.7 Digital Input Port ...........................................................................................42
5.7.1 Supported Digital Input Formats ...............................................................................42
5.7.2 656 Decoder ..........................................................................................................44
5.7.3 Bi-Directional Media Port .........................................................................................44
5.7.4 Digital Input Port Configuration ................................................................................45
5.8 Test Pattern Generator (TPG) ..........................................................................45
5.9 Factory and Display Calibration ........................................................................45
5.10 Input Format Measurement (IFM) ...................................................................45
5.10.1 HSync/VSync Delay ..............................................................................................46
5.10.2 Horizontal and Vertical Measurement .......................................................................47
5.10.3 Format Change Detection ......................................................................................47
5.10.4 Watchdog ............................................................................................................47
5.10.5 Internal Odd/Even Field Detection ...........................................................................47
5.10.6 Input Pixel Measurement .......................................................................................47
5.10.7 Image Phase Measurement ....................................................................................48
5.10.8 Image Boundary Detection .....................................................................................48
5.10.9 Instant Auto ........................................................................................................48
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