CLR663数据手册资源-CSDN文库

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Dedicated reader IC solution for all POS, Fully ISO 14443, ISO 15693 and FeliCa compliant Works in Low power design for (Access and Handhelds) Supports an additional SAMfor securityapplications Compact footprint of HVQFN32 packagefor size optimizationOutput power of 5.0Vto achieve maximum RF stability High Baud Rates of up to 848kbitsfor high speed transactions Design and integration supportCertified for payment and e-govapplications First samples end 2010 根据给定的文件信息，以下是关于CLR663数据手册中所提及的关键知识点的详细描述。数据手册的标题为"CLR663数据手册"，而描述中提到的产品为“RC663”。描述中强调了几个关键特点： 1. 专用的POS读卡器IC解决方案：CLR663是一款专门设计用作读卡器集成电路（IC）的解决方案，适用于各种支付终端（POS）设备。 2. 全面符合ISO标准：产品符合ISO 14443、ISO 15693和FeliCa标准，表明它支持主流的非接触式智能卡和RFID标签技术，包括广泛用于公共交通、门禁系统、电子票务等应用的协议。 3. 低功耗设计：产品被设计为低功耗，适用于接入点和便携式设备，这表示它能在低能量消耗下运行，延长设备的电池寿命，非常适合需要电池供电的移动应用。 4. 安全性支持：支持附加的安全访问模块（SAM），用于安全应用，提供了额外的安全层来保护敏感数据，防止未授权访问。 5. 小巧封装：采用了HVQFN32封装，占用较小的印刷电路板空间，适合对尺寸有严格要求的应用场合。 6. 输出功率和高速数据传输：具有高达5.0V的输出功率和最高达848kbps的高速数据传输率，确保了射频（RF）通信的稳定性和高效性。 7. 设计和集成支持：提供设计和集成支持，这表示产品厂商提供技术支持帮助客户在自己的产品中整合CLR663。 8. 认证：产品已通过支付和电子政务应用的认证，说明它已符合相关行业的安全和性能标准，适用于正式的支付和政府服务环境。 9. 样品推出时间：产品样品预计在2010年底推出，这表明产品已经准备好进入市场或进行市场测试。部分内容中提供了一些关于CLRC663接触式读卡器IC的具体技术信息。CLRC663是一款高度集成的13.56MHz非接触式通信收发器IC。它支持以下操作模式： - ISO/IEC 14443A/MIFARE读写模式 - ISO/IEC 14443B读写模式 - JISX6319-4读写模式（与FeliCa 1兼容） - ISO/IEC 18092被动启动模式 - ISO/IEC 15693读写模式 - ICODE EPC UID/EPC OTP读写模式 - ISO/IEC 18000-3模式3/EPC Class-1 HF读写模式 CLRC663的内部发射器能够驱动读写器天线与ISO/IEC 14443A/MIFARE卡和应答器通信，无需额外的主动电路。数字模块管理完整的ISO/IEC 14443A帧结构和错误检测功能（奇偶校验和循环冗余校验-CRC）。它支持MIFARE Classic 1K、MIFARE Classic 4K、MIFARE Ultralight、MIFARE Ultralight C、MIFARE PLUS和MIFARE DESFire产品，并提供高达848kbit/s的MIFARE高速数据传输。此外，CLRC663还支持ISO/IEC 14443B读写器/通信方案的第2层和第3层（不包括防冲突），以及FeliCa编码信号的解调和解码。它处理FeliCa帧结构和错误检测（如CRC），并支持高达424kbit/s的FeliCa高速数据传输。 CLRC663支持ISO/IEC 18092的P2P被动启动模式，ISO/IEC 15693的接近协议，EPC UID，以及ISO/IEC 18000-3模式3/EPC Class-1 HF。 CLRC663支持以下主机接口： - 串行外设接口（SPI）通过这些知识点，可以全面了解CLR663数据手册中介绍的非接触式读卡器IC的技术规格、功能和应用场景。这些信息对于开发支付系统、访问控制系统和任何需要非接触式技术集成的项目都非常有用。

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1. Introduction

This document describes the functionality and electrical specifications of the contactless

reader/writer IC CLRC663.

2. General description

The CLRC663 is a highly integrated transceiver IC for contactless communication at

13.56 MHz.

The CLRC663 transceiver IC supports the following operating modes

• Read/write mode supporting ISO/IEC 14443A/MIFARE

• Read/write mode supporting ISO/IEC 14443B

• Read/write mode supporting JIS X 6319-4 (comparable with FeliCa

(see

Section 21.5

) scheme)

• Passive initiator mode according to ISO/IEC 18092

• Read/write mode supporting ISO/IEC 15693

• Read/write mode supporting ICODE EPC UID/ EPC OTP

• Read/write mode supporting ISO/IEC 18000-3 mode 3/ EPC Class-1 HF

The CLRC663’s internal transmitter is able to drive a reader/writer antenna designed to

communicate with ISO/IEC 14443A/MIFARE cards and transponders without additional

active circuitry. The digital module manages the complete ISO/IEC 14443A framing and

error detection functionality (parity and CRC).

The CLRC663 supports MIFARE Classic 1K, MIFARE Classic 4K, MIFARE Ultralight,

MIFARE Ultralight C, MIFARE PLUS and MIFARE DESFire products. The CLRC663

supports MIFARE higher transfer speeds of up to 848 kbit/s in both directions.

The CLRC663 supports layer 2 and 3 of the ISO/IEC 14443B reader/writer

communication scheme except anticollision. The anticollision needs to be implemented in

the firmware of the host controller as well as in the upper layers.

The CLRC663 is able to demodulate and decode FeliCa coded signals.The FeliCa

receiver part provides the demodulation and decoding circuitry for FeliCa coded signals.

The CLRC663 handles the FeliCa framing and error detection such as CRC. The

CLRC663 supports FeliCa higher transfer speeds of up to 424 kbit/s in both directions.

CLRC663

Contactless reader IC

Rev. 3.5 — 5 September 2012

171135

Product data sheet

COMPANY PUBLIC

1. In the following the word FeliCa is used for JIS X 6319-4

Product data sheet

COMPANY PUBLIC

Rev. 3.5 — 5 September 2012

171135 2 of 137

NXP Semiconductors

CLRC663

Contactless reader IC

The CLRC663 is supporting the P2P passive initiator mode in accordance with

ISO/IEC 18092.

The CLRC663 supports the vicinity protocol according to ISO/IEC15693, EPC UID and

ISO/IEC 18000-3 mode 3/ EPC Class-1 HF.

The following host interfaces are supported:

• Serial Peripheral Interface (SPI)

• Serial UART (similar to RS232 with voltage levels dependent on pin voltage supply)

• I

C-bus interface (two versions are implemented: I2C and I2CL)

The CLRC663 supports the connection of a secure access module (SAM). A dedicated

separate I2C interface is implemented for a connection of the SAM. The SAM can be used

for high secure key storage and acts as a very performant crypto coprocessor. A

dedicated SAM is available for connection to the CLRC663.

3. Features and benefits

 High RF output power frontend IC for transfer speed up to 848 kbit/s

 Supports ISO/IEC 14443 A/MIFARE, ISO/IEC 14443 B and FeliCa

 P2P passive initiator mode in accordance with ISO/IEC 18092

 Supports ISO/IEC15693, ICODE EPC UID and ISO/IEC 18000-3 mode 3/ EPC

Class-1 HF

 Supports MIFARE Classic encryption in read/write mode

 Low-Power Card Detection

 Compliance to “EMV contactless protocol specification V2.0.1” on RF level can be

achieved

 Antenna connection with minimum number of external components

 Supported host interfaces:

 SPI up to 10 Mbit/s

 I

C-bus interfaces up to 400 kBd in Fast mode, up to 1000 kBd in Fast mode plus

 RS232 Serial UART up to 1228.8 kBd, with voltage levels dependent on pin

voltage supply

 Separate I

C-bus interface for connection of a secure access module (SAM)

 FIFO buffer with size of 512 byte for highest transaction performance

 Flexible and efficient power saving modes including hard power down, standby and

low-power card detection

 Cost saving by integrated PLL to derive system CPU clock from 27.12 MHz RF quartz

crystal

 3.3 V to 5 V power supply

 Up to 8 free programmable input/output pins

 Typical operating distance in read/write mode for communication to a

ISO/IEC 14443A/MIFARE Card up to 12 cm, depending on the antenna size and

tuning

Product data sheet

COMPANY PUBLIC

Rev. 3.5 — 5 September 2012

171135 5 of 137

NXP Semiconductors

CLRC663

Contactless reader IC

7.1 Pin description

[1] This pin is used for connection of a buffer capacitor. Connection of a supply voltage might damage the device.

Table 3. Pin description

Pin Symbol Type Description

1 TDO O test data output for boundary scan interface

2 TDI I test data input boundary scan interface

3 TMS I test mode select boundary scan interface

4 TCK I test clock boundary scan interface

5 SIGIN I Contactless communication interface output.

6 SIGOUT O Contactless communication interface input.

7 DVDD PWR digital power supply buffer

[1]

8 VDD PWR power supply

9 AVDD PWR analog power supply buffer

[1]

10 AUX1 O auxiliary outputs: Pin is used for analog test signal

11 AUX2 O auxiliary outputs: Pin is used for analog test signal

12 RXP I receiver input pin for the received RF signal.

13 RXN I receiver input pin for the received RF signal.

14 VMID PWR internal receiver reference voltage

[1]

15 TX2 O transmitter 2: delivers the modulated 13.56 MHz carrier

16 TVSS PWR transmitter ground, supplies the output stage of TX1, TX2

17 TX1 O transmitter 1: delivers the modulated 13.56 MHz carrier

18 TVDD PWR transmitter voltage supply

19 XTAL1 I crystal oscillator input: Input to the inverting amplifier of the oscillator. This is pin is also the

input for an externally generated clock (fosc = 27,12 MHz)

20 XTAL2 O crystal oscillator output: output of the inverting amplifier of the oscillator

21 PDOWN I Power Down

22 CLKOUT O clock output

23 SCL O Serial Clock line

24 SDA I/O Serial Data Line

25 PVDD PWR pad power supply

26 IFSEL0 I host interface selection 0

27 IFSEL1 I host interface selection 1

28 IF0 I/O interface pin, multifunction pin: Can be assigned to host interface RS232, SPI, I

C, I

C-L

29 IF1 I/O interface pin, multifunction pin: Can be assigned to host interface SPI, I

C, I

C-L

30 IF2 I/O interface pin, multifunction pin: Can be assigned to host interface RS232, SPI, I

C, I

C-L

31 IF3 I/O interface pin, multifunction pin: Can be assigned to host interface RS232, SPI, I

C, I

C-L

32 IRQ O interrupt request: output to signal an interrupt event

33 VSS PWR ground and heatsink connection

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