3
Content
Flow of program and programming algorithms……….4
Code Construction………………………………………5
FCFS
SPN
RR
Feedback
Test & Comparison……………………………………..12
Scheduler Simulation…………………………………...14
FCFS & RR
FCFS & Feedback
RR & SPN
Conclusion……………………………………………….25
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4
Flow of program and programming algorithms
The first part of the project, we need to write program codes in implementing
different short-term schedulers and compare the schedules within each of
them. Many scheduling algorithms contain different set of parameters in which
control the dispatching of the processes. For example:
Round Robin: Time Quantum, etc.
Feedback: Number of Feedback Queues, etc.
Priority: Priority Numbers.
The following are the pair of inherited scheduling algorithms that we need
to define:
(a) Round Robin and FCFS.
(b) Feedback and FCFS.
(c) Round Robin and Shortest Process Next.
The second part of the project, we need to write a program to implement
The Hypothetical Operating System Testbed(HOST), it is a
multiprogramming system with a four level priority process dispatcher
operating within the constraints of finite available resources. For the
HOST dispatcher, we need to use the algorithm which we have do in part
one (Round Robin, FCFS and Feedback scheduler), For the Real Time
queue, we will the FCFS scheduler. For the priority queue, we will use
Feedback scheduler. For the lowest priority queue, we will use the Round
Robin scheduler.
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5
Code Construction
FCFS
FCFS part……actually no modification can be made either.
SPN:
I think the example that is given has a BUG here.
Check this grammar in active Pcb, it controls the movement of the
dispatcher by using a loop. The loop terminal element I will increase
from 0 to 9 by adding 1 each time. And then the dispatcher will move
to the next. However the ‘I’ just record the number but not the order of
the process!! So in this way the output will never chance no matter
what the input of the executing time is given.
By running the program to check what I have expected:
Actually with whatever input time the output will be at the same
sequence as the recorder ‘I’ comes too late!
So what I did here is add an recorder ‘id’ in the pcb defining period of
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