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PCIe 1.0协议规范
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PCIe 1.0协议规范,对PCIe接口的电气特性、机械特性以及PCIe协议的各层都进行了详细的说明和描述
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PCI Express
™
Card Electromechanical
Specification
Revision 1.0
July 22, 2002
PCI EXPRESS CARD ELECTROMECHANICAL SPECIFICATION, REV 1.0
2
Revision Revision History Date
1.0 Initial release. 7/22/02
PCI-SIG disclaims all warranties and liability for the use of this document and the
information contained herein and assumes no responsibility for any errors that may appear
in this document, nor does the PCI-SIG make a commitment to update the information
contained herein.
Contact the PCI-SIG office to obtain the latest revision of the specification.
Questions regarding this specification or membership in PCI-SIG may be forwarded to:
Membership Services
www.pcisig.com
E-mail: administration@pcisig.com
Phone: 1-800-433-5177 (Domestic Only)
503-291-2569
Fax: 503-297-1090
Technical Support
techsupp@pcisig.com
DISCLAIMER
This PCI Express Card Electromechanical Specification is provided "as is" with
no warranties whatsoever, including any warranty of merchantability,
noninfringement, fitness for any particular purpose, or any warranty otherwise
arising out of any proposal, specification, or sample. PCI-SIG disclaims all
liability for infringement of proprietary rights, relating to use of information in
this specification. No license, express or implied, by estoppel or otherwise, to
any intellectual property rights is granted herein.
All product names are trademarks, registered trademarks, or service marks of
their respective owners.
Copyright © 2002 PCI-SIG
PCI EXPRESS CARD ELECTROMECHANICAL SPECIFICATION, REV 1.0
3
Contents
1. INTRODUCTION......................................................................................................... 7
1.1. TERMS AND DEFINITIONS........................................................................................ 7
1.2. REFERENCE DOCUMENTS........................................................................................ 9
1.3. SPECIFICATION CONTENTS ..................................................................................... 9
1.4. OBJECTIVES............................................................................................................... 10
1.5. ELECTRICAL OVERVIEW........................................................................................ 10
1.6. MECHANICAL OVERVIEW...................................................................................... 11
2. AUXILIARY SIGNALS............................................................................................. 15
2.1. REFERENCE CLOCK ................................................................................................. 16
2.1.1. Low Voltage Swing, Differential Clocks....................................................... 16
2.1.2. Spread Spectrum Clocking (SSC) ................................................................. 16
2.2. POWER GOOD ............................................................................................................ 16
2.2.1. Initial Power-Up (G3 to L0) ......................................................................... 17
2.2.2. Power Management States (S0 to S3/S4 to S0)............................................. 18
2.2.3. Power Down.................................................................................................. 19
2.3. WAKE# SIGNAL (OPTIONAL).................................................................................. 20
2.4. SMBUS (OPTIONAL).................................................................................................. 23
2.4.1. Capacitive Load of High-power SMBus Lines.............................................. 23
2.4.2. Minimum Current Sinking Requirements for SMBus Devices ...................... 24
2.4.3. SMBus “Back Powering” Considerations.................................................... 24
2.4.4. Power-on Reset............................................................................................. 24
2.5. JTAG PINS (OPTIONAL)............................................................................................ 24
2.6. AUXILIARY SIGNAL PARAMETRIC SPECIFICATIONS...................................... 25
2.6.1. DC Specifications.......................................................................................... 25
2.6.2. AC Specifications.......................................................................................... 26
2.6.3. REFCLK Specifications ................................................................................ 26
3. HOT INSERTION AND REMOVAL........................................................................ 31
3.1. SCOPE ...................................................................................................................... 31
3.2. PRESENCE DETECT .................................................................................................. 31
4. ADD-IN CARD ELECTRICAL REQUIREMENTS ................................................. 33
4.1. POWER SUPPLY REQUIREMENTS......................................................................... 33
4.2. POWER CONSUMPTION........................................................................................... 35
4.3. POWER SUPPLY SEQUENCING .............................................................................. 36
4.4. POWER SUPPLY DECOUPLING .............................................................................. 36
4.5. ELECTRICAL TOPOLOGIES AND LINK DEFINITIONS....................................... 37
4.5.1. Topologies..................................................................................................... 37
4.5.2. Link Definition .............................................................................................. 39
PCI EXPRESS CARD ELECTROMECHANICAL SPECIFICATION, REV 1.0
4
4.6. ELECTRICAL BUDGETS........................................................................................... 40
4.6.1. AC Coupling Capacitors............................................................................... 40
4.6.2. Insertion Loss Values (Voltage Transfer Function)...................................... 40
4.6.3. Jitter Values.................................................................................................. 42
4.6.4. Crosstalk ....................................................................................................... 43
4.6.5. Bit-to-Bit Skew .............................................................................................. 44
4.6.6. Equalization.................................................................................................. 44
4.6.7. Skew within the Differential Pair.................................................................. 45
4.7. EYE DIAGRAMS AT THE ADD-IN CARD INTERFACE........................................ 45
4.7.1. Add-in Card Transmitter Compliance Eye-Diagram.................................... 46
4.7.2. Add-in Card Receiver Compliance Eye-Diagram......................................... 47
5. CONNECTOR SPECIFICATION.............................................................................. 49
5.1. CONNECTOR PINOUT............................................................................................... 49
5.2. CONNECTOR INTERFACE DEFINITIONS.............................................................. 54
5.3. SIGNAL INTEGRITY REQUIREMENTS AND TEST PROCEDURES................... 59
5.4. CONNECTOR ENVIRONMENTAL AND OTHER REQUIREMENTS................... 62
5.4.1. Environmental Requirements........................................................................ 62
5.4.2. Mechanical Requirements............................................................................. 64
5.4.3. Current Rating Requirement......................................................................... 65
5.4.4. Additional Considerations ............................................................................ 66
6. ADD-IN CARD FORM FACTORS AND IMPLEMENTATION............................. 67
6.1. ADD-IN CARD FORM FACTORS ............................................................................. 67
6.2. CONNECTOR AND ADD-IN CARD LOCATIONS.................................................. 76
6.3. CARD INTEROPERABILITY..................................................................................... 82
PCI EXPRESS CARD ELECTROMECHANICAL SPECIFICATION, REV 1.0
5
Figures
FIGURE 1-2: EXAMPLE OF A SERVER I/O BOARD WITH PCI EXPRESS SLOTS ON
A RISER ....................................................................................................................... 12
FIGURE 2-1: DIFFERENTIAL REFCLK WAVEFORM.................................................... 16
FIGURE 2-2: POWER UP..................................................................................................... 17
FIGURE 2-3: POWER MANAGEMENT STATES ............................................................. 18
FIGURE 2-4: POWER DOWN ............................................................................................. 19
FIGURE 2-5: SINGLE ENDED MEASUREMENT POINTS FOR T
RISE
AND T
FALL
......... 28
FIGURE 2-6: SINGLE ENDED MEASUREMENT POINTS FOR V
OVS
,V
UDS
, AND V
RB
28
FIGURE 2-7: DIFFERENTIAL (CLOCK – CLOCK#) MEASUREMENT POINTS (T
PERIOD
,
DUTY CYCLE, AND JITTER).................................................................................... 29
FIGURE 2-8: V
CROSS
RANGE CLARIFICATION................................................................ 29
FIGURE 3-1: PRESENCE DETECT IN A HOT PLUG ENVIRONMENT......................... 32
FIGURE 4-1: PCI EXPRESS ON THE SYSTEM BOARD ................................................. 37
FIGURE 4-2: PCI EXPRESS CONNECTOR ON SYSTEM BOARD WITH AN ADD-IN
CARD............................................................................................................................38
FIGURE 4-3: PCI EXPRESS CONNECTOR ON A RISER CARD WITH AN ADD-IN
CARD............................................................................................................................38
FIGURE 4-4: LINK DEFINITION FOR TWO COMPONENTS......................................... 39
FIGURE 4-5: INSERTION LOSS BUDGETS...................................................................... 41
FIGURE 4-6: JITTER BUDGET........................................................................................... 42
FIGURE 4-7: CROSSTALK.................................................................................................. 44
FIGURE 4-8: EYE MEASUREMENT.................................................................................. 45
FIGURE 4-9: TRANSMITTER COMPLIANCE EYE DIAGRAM ..................................... 46
FIGURE 4-10: RECEIVER COMPLIANCE EYE DIAGRAM............................................ 47
FIGURE 5-1: CONNECTOR FORM FACTOR ................................................................... 54
FIGURE 5-2: RECOMMENDED FOOTPRINT................................................................... 55
FIGURE 5-3: ADD-IN CARD EDGE-FINGER DIMENSIONS.......................................... 56
FIGURE 5-4: ILLUSTRATION OF HOW A RETENTION CLIP IS LATCHED ONTO
THE CONNECTOR RIDGE ........................................................................................ 58
FIGURE 5-5: ILLUSTRATION OF ADJACENT PAIRS.................................................... 62
FIGURE 5-6: CONTACT RESISTANCE MEASUREMENT POINTS............................... 63
FIGURE 6-1: STANDARD HEIGHT PCI EXPRESS ADD-IN CARD WITHOUT THE I/O
BRACKET.................................................................................................................... 68
FIGURE 6-2: STANDARD HEIGHT PCI EXPRESS ADD-IN CARD WITH THE I/O
BRACKET AND CARD RETAINER.......................................................................... 69
FIGURE 6-3: STANDARD ADD-IN CARD I/O BRACKET.............................................. 70
FIGURE 6-4: BRACKET DESIGN WITH THE MOUNTING TABS MOUNTED ON THE
PRIMARY SIDE OF THE ADD-IN CARD................................................................. 71
FIGURE 6-5: ADD-IN CARD RETAINER.......................................................................... 72
FIGURE 6-6: LOW PROFILE PCI EXPRESS ADD-IN CARD WITHOUT THE I/O
BRACKET.................................................................................................................... 73
FIGURE 6-7: LOW PROFILE PCI EXPRESS ADD-IN CARD WITH THE I/O BRACKET74
FIGURE 6-8: LOW PROFILE I/O BRACKET..................................................................... 75
FIGURE 6-9: EXAMPLE OF A PC SYSTEM IN MICROATX FORM FACTOR............. 76
FIGURE 6-10: INTRODUCTION OF A PCI EXPRESS CONNECTOR IN A MICROATX
SYSTEM....................................................................................................................... 77
FIGURE 6-11: MORE PCI EXPRESS CONNECTORS ARE INTRODUCED ON A
MICROATX SYSTEM BOARD.................................................................................. 78
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