Stm32 UART驱动（ DMA 或者中断）

#include "drv_uart.h" #include <string.h> /*----------------------------------------------* * usart configuration * *----------------------------------------------*/ #define UART_USE_DMA /* UART GPIO define. */ #ifdef LVP_USE_UART1 #define UART1_GPIO_TX GPIO_Pin_9 #define UART1_TX_PIN_SOURCE GPIO_PinSource9 #define UART1_GPIO_RX GPIO_Pin_10 #define UART1_RX_PIN_SOURCE GPIO_PinSource10 #define UART1_GPIO GPIOA #define UART1_GPIO_RCC RCC_AHB1Periph_GPIOA #define RCC_APBPeriph_UART1 RCC_APB2Periph_USART1 static uint8_t g_uart1_recv_buff[MAIN_UART_BUF_SIZE]; static uint8_t g_uart1_send_buff[MAIN_UART_BUF_SIZE]; TS_STM32_UART uart1 = { USART1, USART1_IRQn, UART_DMA_RX | UART_DMA_TX, { DMA2_Stream5, DMA_Channel_4, DMA_FLAG_TCIF5, DMA2_Stream5_IRQn, 0, MAIN_UART_BUF_SIZE, g_uart1_recv_buff, }, { DMA2_Stream7, DMA_Channel_4, DMA_FLAG_TCIF7, DMA2_Stream7_IRQn, 0, MAIN_UART_BUF_SIZE, g_uart1_send_buff, }, }; #endif #ifdef LVP_USE_UART2 #define UART2_GPIO_TX GPIO_Pin_2 #define UART2_TX_PIN_SOURCE GPIO_PinSource2 #define UART2_GPIO_RX GPIO_Pin_3 #define UART2_RX_PIN_SOURCE GPIO_PinSource3 #define UART2_GPIO GPIOA #define UART2_GPIO_RCC RCC_AHB1Periph_GPIOA #define RCC_APBPeriph_UART2 RCC_APB1Periph_USART2 static uint8_t g_uart2_recv_buff[MAIN_UART_BUF_SIZE]; static uint8_t g_uart2_send_buff[MAIN_UART_BUF_SIZE]; TS_STM32_UART uart2 = { USART2, USART2_IRQn, 0, { DMA1_Stream5, DMA_Channel_4, DMA_FLAG_TCIF5, DMA1_Stream5_IRQn, 0, MAIN_UART_BUF_SIZE, g_uart2_recv_buff, }, { DMA1_Stream6, DMA_Channel_4, DMA_FLAG_TCIF6, DMA1_Stream6_IRQn, 0, MAIN_UART_BUF_SIZE, g_uart2_send_buff, } }; #endif #ifdef LVP_USE_UART3 #define UART3_GPIO_TX GPIO_Pin_8 #define UART3_TX_PIN_SOURCE GPIO_PinSource8 #define UART3_GPIO_RX GPIO_Pin_9 #define UART3_RX_PIN_SOURCE GPIO_PinSource9 #define UART3_GPIO GPIOD #define UART3_GPIO_RCC RCC_AHB1Periph_GPIOD #define RCC_APBPeriph_UART3 RCC_APB1Periph_USART3 static uint8_t g_uart3_recv_buff[MAIN_UART_BUF_SIZE]; static uint8_t g_uart3_send_buff[MAIN_UART_BUF_SIZE]; TS_STM32_UART uart3 = { USART3, USART3_IRQn, 0, { DMA1_Stream1, DMA_Channel_4, DMA_FLAG_TCIF1, DMA1_Stream1_IRQn, 0, MAIN_UART_BUF_SIZE, g_uart3_recv_buff, }, { DMA1_Stream3, DMA_Channel_4, DMA_FLAG_TCIF3, DMA1_Stream3_IRQn, 0, MAIN_UART_BUF_SIZE, g_uart3_send_buff, } }; #endif #ifdef LVP_USE_UART4 #define UART4_GPIO_TX GPIO_Pin_10 #define UART4_TX_PIN_SOURCE GPIO_PinSource10 #define UART4_GPIO_RX GPIO_Pin_11 #define UART4_RX_PIN_SOURCE GPIO_PinSource11 #define UART4_GPIO GPIOC #define UART4_GPIO_RCC RCC_AHB1Periph_GPIOC #define RCC_APBPeriph_UART4 RCC_APB1Periph_UART4 static uint8_t g_uart4_recv_buff[MAIN_UART_BUF_SIZE]; static uint8_t g_uart4_send_buff[MAIN_UART_BUF_SIZE]; struct stm32_uart uart4 = { UART4, UART4_IRQn, 0, { DMA1_Stream2, DMA_Channel_4, DMA_FLAG_TCIF2, DMA1_Stream2_IRQn, 0, MAIN_UART_BUF_SIZE, g_uart4_recv_buff, }, { DMA1_Stream4, DMA_Channel_4, DMA_FLAG_TCIF4, DMA1_Stream4_IRQn, 0, MAIN_UART_BUF_SIZE, g_uart4_send_buff, } }; #endif #ifdef LVP_USE_UART5 #define UART5_GPIO_TX GPIO_Pin_12 #define UART5_TX_PIN_SOURCE GPIO_PinSource12 #define UART5_GPIO_RX GPIO_Pin_2 #define UART5_RX_PIN_SOURCE GPIO_PinSource2 #define UART5_TX GPIOC #define UART5_RX GPIOD #define UART5_GPIO_RCC_TX RCC_AHB1Periph_GPIOB #define UART5_GPIO_RCC_RX RCC_AHB1Periph_GPIOD #define RCC_APBPeriph_UART5 RCC_APB1Periph_UART5 static uint8_t g_uart5_recv_buff[MAIN_UART_BUF_SIZE]; static uint8_t g_uart5_send_buff[MAIN_UART_BUF_SIZE]; struct stm32_uart uart5 = { UART5, UART5_IRQn, 0, { DMA1_Stream0, DMA_Channel_4, DMA_FLAG_TCIF0, DMA1_Stream0_IRQn, 0, MAIN_UART_BUF_SIZE, g_uart5_recv_buff, }, { DMA1_Stream7, DMA_Channel_4, DMA_FLAG_TCIF7, DMA1_Stream7_IRQn, 0, MAIN_UART_BUF_SIZE, g_uart5_send_buff, } }; #endif #ifdef LVP_USE_UART6 #define UART6_GPIO_TX GPIO_Pin_6 #define UART6_TX_PIN_SOURCE GPIO_PinSource6 #define UART6_GPIO_RX GPIO_Pin_7 #define UART6_RX_PIN_SOURCE GPIO_PinSource7 #define UART6_GPIO GPIOC #define UART6_GPIO_RCC RCC_AHB1Periph_GPIOC #define RCC_APBPeriph_UART6 RCC_APB2Periph_USART6 /*Transmit and receive buffer*/ static uint8_t g_uart6_recv_buff[PC_UART_BUF_SIZE]; static uint8_t g_uart6_send_buff[PC_UART_BUF_SIZE]; TS_STM32_UART uart6 = { USART6, USART6_IRQn, 0, { DMA2_Stream1, DMA_Channel_5, DMA_FLAG_TCIF1, DMA2_Stream1_IRQn, 0, PC_UART_BUF_SIZE, g_uart6_recv_buff, }, { DMA2_Stream6, DMA_Channel_5, DMA_FLAG_TCIF6, DMA2_Stream6_IRQn, 0, PC_UART_BUF_SIZE, g_uart6_send_buff, } }; #endif static void DrvDmaConfig(TS_STM32_UART *uart,TE_UART_DIR dir) { NVIC_InitTypeDef NVIC_InitStructure; DMA_InitTypeDef DMA_InitStructure; if (E_UART_RX== dir ) { DMA_DeInit(uart->rx.stream); while (DMA_GetCmdStatus(uart->rx.stream) != DISABLE); DMA_InitStructure.DMA_Channel = uart->rx.channel; DMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t)uart->rx.buffer; DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralToMemory; DMA_InitStructure.DMA_BufferSize = uart->rx.buffer_size; } else if (E_UART_TX== dir ) { DMA_DeInit(uart->tx.stream); while (DMA_GetCmdStatus(uart->tx.stream) != DISABLE); DMA_InitStructure.DMA_Channel = uart->tx.channel; DMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t)uart->tx.buffer; DMA_InitStructure.DMA_DIR = DMA_DIR_MemoryToPeripheral; DMA_InitStructure.DMA_BufferSize = uart->tx.buffer_size; } else { return; } DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t) &(uart->uart_device->DR); DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable; DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable; DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte; DMA_InitStructure.DMA_MemoryDataSize = DMA_PeripheralDataSize_Byte; DMA_InitStructure.DMA_Mode = DMA_Mode_Normal; DMA_InitStructure.DMA_Priority = DMA_Priority_High; DMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Disable; DMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_Full; DMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_Single; DMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single; if (E_UART_RX == dir ) { DMA_Init(uart->rx.stream, &DMA_InitStructure); DMA_ClearFlag(uart->rx.stream, uart->rx.flag); USART_DMACmd(uart->uart_device, USART_