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杰理AC7018F规格书
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2024-04-02
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JL7018F Features CPU 32bit Dual-Core DSP Maximum speed 160MHz 32KB ICache and 16KB DCache IEEE754 Single precision FPU Mathematical accelerate engine Interrupts with 8 priority level
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JL7018F Datasheet
Zhuhai Jieli Technology Co.,LTD
Version:1.3
Date:2023.02.22
Copyright © Zhuhai Jieli Technology Co.,LTD. All rights reserved.
JL7018F Datasheet
1 / 20
JL7018F Features
CPU
32bit Dual-Core DSP
Maximum speed 160MHz
32KB ICache and 16KB DCache
IEEE754 Single precision FPU
Mathematical accelerate engine
Interrupts with 8 priority level
Memory
On-chip 640KB SRAM
Support MMU
Built-In Flash
Clocks
On-chip 16 MHz clock oscillator
On-chip 200 kHz lower-temperature-drift
clock oscillator
24 MHz crystal oscillator
DSP Audio Processing
SBC, AAC Audio decodes supported for BT
audio
mSBC voice codec supported for BT phone
Supports MP2, MP3, WMA, APE, FLAC,
AAC, MP4, M4A, WAV, AIF, AIFC audio
decoding
Packet Loss Concealment (PLC) for voice
processing
Single/Dual MIC Environmental Noise
Cancellation (ENC)
Multi-band DRC limiter
Multi-band EQ configuration for voice
Effects
Audio Codec
Two channels 24-bit DAC,SNR ≥ 104dB
Four channels 24-bit ADC,SNR ≥ 95dB
Audio DAC Sampling rates of
8kHz/11.025kHz/16kHz/22.05kHz/24kHz/
32kHz/44.1kHz/48kHz/64kHz/88.2kHz/
96kHz are supported
Audio ADC Sampling rates of
8kHz/11.025kHz/16kHz/22.05kHz/24kHz/32
kHz/44.1kHz/48kHz are supported
Support four digital/analog MIC inputs
Four channels analog audio inputs
Audio DAC supports differential cap-less
mode or single-ended mode
Direct drive 16ohm/32ohm Speaker loading
ANC
ANC processing engine up to 750 kHz sample
rate
7.5μs analog to analog latency
Supports 4 differential or single-ended analog
inputs, 4 digital microphone inputs for ANC
Supports 2 channels Feed-Forward,
Feed-Back, Hybrid ANC
ANC module include 20 double precision
Biquad filters for each FF/FB/ music
compensation control
Bluetooth
Compliant with Bluetooth
V5.3+BR+EDR+BLE specification
Support AoA/AoD direction finding
Support LE audio BIS/CIS full function
Meet class2 and class3 transmitting power
requirement
Maximum +9dbm transmitting power
EDR receiver with minimum -95dBm
sensitivity
Support a2dp\avctp\avdtp\avrcp\hfp\spp\smp\
att\gap\gatt\rfcomm\sdp\l2cap profile
bap 1.0\pacs 1.0\ccp 1.0\mcp 1.0\micp
1.0\vcp 1.0\csip 1.0
a2dp 1.3.2\avctp 1.4\avdtp 1.3\ avrcp
1.6.2\hfp 1.8 \spp 1.2\rfcomm 1.1\pnp 1.3\hid
1.1.1\sdp core5.3\l2cap core 5.3
TEL:0755-82922363 QQ:371116160
JL7018F Datasheet
2
/ 20
Peripherals
One full speed USB OTG controller
One SD host controller for eMMC/SD
Six multi-function 32-bit timers, support
capture and PWM mode
Four UART interface,
UART0,UART1&UART2 support DMA
I2C Master/Slave interface
SPI Master/Slave interface
I2S Master/Slave interface
QDEC
Low power CapSense
12-channel 10-bit ADC for analog sampling
4-channel Motor PWM controller
24 Individually programmable and
multiplexed GPIO pins
Up to 12 external interrupt/wake-up
source(low power available,can be
multiplexed to any I/O)
PMU
Built-in lithium battery charging manager,up
to 200mA charging current
Built-in LDO and Buck DC-DC converter
Less than 2uA sleep current
VPWR range : 4.5V to 5.5V
VBAT range : 2.2V to 4.5V
IOVDD range : 2.2V to 3.6V
Packages
QFN40(5mm*5mm)
Temperature
Operating temperature: -40℃ to +85℃
Storage temperature: -65℃ to +150℃
Applications
Bluetooth Stereo Headsets and Headphones
Bluetooth Stereo ANC Headsets and
Headphones
Bluetooth TWS ANC Earphones
TEL:0755-82922363 QQ:371116160
JL7018F Datasheet
3 / 20
1 Block Diagram
Figure 1-1 JL7018F Block Diagram
TEL:0755-82922363 QQ:371116160
JL7018F Datasheet
4 / 20
2 Pin Definition
2.1 Pin Assignment
Figure 2-1 JL7018F Package Diagram
TEL:0755-82922363 QQ:371116160
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