################################################################################
# Vivado (TM) v2017.4 (64-bit)
#
# README.txt: Please read the sections below to understand the steps required
# to simulate the design for a simulator, the directory structure
# and the generated exported files.
#
################################################################################
1. Simulate Design
To simulate design, cd to the simulator directory and execute the script.
For example:-
% cd questa
% ./top.sh
The export simulation flow requires the Xilinx pre-compiled simulation library
components for the target simulator. These components are referred using the
'-lib_map_path' switch. If this switch is specified, then the export simulation
will automatically set this library path in the generated script and update,
copy the simulator setup file(s) in the exported directory.
If '-lib_map_path' is not specified, then the pre-compiled simulation library
information will not be included in the exported scripts and that may cause
simulation errors when running this script. Alternatively, you can provide the
library information using this switch while executing the generated script.
For example:-
% ./top.sh -lib_map_path /design/questa/clibs
Please refer to the generated script header 'Prerequisite' section for more details.
2. Directory Structure
By default, if the -directory switch is not specified, export_simulation will
create the following directory structure:-
<current_working_directory>/export_sim/<simulator>
For example, if the current working directory is /tmp/test, export_simulation
will create the following directory path:-
/tmp/test/export_sim/questa
If -directory switch is specified, export_simulation will create a simulator
sub-directory under the specified directory path.
For example, 'export_simulation -directory /tmp/test/my_test_area/func_sim'
command will create the following directory:-
/tmp/test/my_test_area/func_sim/questa
By default, if -simulator is not specified, export_simulation will create a
simulator sub-directory for each simulator and export the files for each simulator
in this sub-directory respectively.
IMPORTANT: Please note that the simulation library path must be specified manually
in the generated script for the respective simulator. Please refer to the generated
script header 'Prerequisite' section for more details.
3. Exported script and files
Export simulation will create the driver shell script, setup files and copy the
design sources in the output directory path.
By default, when the -script_name switch is not specified, export_simulation will
create the following script name:-
<simulation_top>.sh (Unix)
When exporting the files for an IP using the -of_objects switch, export_simulation
will create the following script name:-
<ip-name>.sh (Unix)
Export simulation will create the setup files for the target simulator specified
with the -simulator switch.
For example, if the target simulator is "ies", export_simulation will create the
'cds.lib', 'hdl.var' and design library diectories and mappings in the 'cds.lib'
file.
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Xilinx FPGA multiboot加载
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在Artix-7 xc7a100tffg484-2芯片上使用ICAPE2原语实现multiboot加载
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Xilinx FPGA multiboot加载 (478个子文件)
runme.bat 229B
runme.bat 229B
runme.bat 229B
runme.bat 229B
runme.bat 229B
runme.bat 229B
boot_top.bit 419KB
boot_top.bit 419KB
app.bit 345KB
app.bit 345KB
ila_1.dcp 693KB
ila_1.dcp 693KB
ila_1.dcp 692KB
ila_0.dcp 554KB
ila_0.dcp 554KB
ila_0.dcp 553KB
dbg_hub_CV.dcp 332KB
dbg_hub_CV.dcp 321KB
boot_top_routed.dcp 148KB
boot_top_placed.dcp 140KB
boot_top_opt.dcp 128KB
app_routed.dcp 121KB
app_placed.dcp 118KB
app_opt.dcp 115KB
boot_top.dcp 20KB
app.dcp 7KB
compile.do 888B
compile.do 888B
compile.do 864B
compile.do 864B
compile.do 823B
compile.do 823B
compile.do 813B
compile.do 813B
simulate.do 303B
simulate.do 303B
simulate.do 294B
simulate.do 294B
simulate.do 294B
simulate.do 294B
simulate.do 187B
simulate.do 187B
elaborate.do 175B
elaborate.do 175B
wave.do 32B
wave.do 32B
wave.do 32B
wave.do 32B
wave.do 32B
wave.do 32B
wave.do 32B
wave.do 32B
simulate.do 11B
simulate.do 11B
run.f 463B
run.f 463B
usage_statistics_webtalk.html 33KB
usage_statistics_webtalk.html 27KB
hw_ila_data_1.ila 3KB
hw_ila_data_2.ila 3KB
xsim.ini 19KB
xsim.ini 19KB
vivado.jou 4KB
vivado.jou 731B
vivado.jou 720B
vivado.jou 714B
vivado.jou 664B
vivado.jou 664B
vivado_11528.backup.jou 637B
vivado.jou 637B
vivado.jou 632B
ISEWrap.js 7KB
ISEWrap.js 7KB
ISEWrap.js 7KB
ISEWrap.js 7KB
ISEWrap.js 7KB
ISEWrap.js 7KB
rundef.js 1KB
rundef.js 1KB
rundef.js 1KB
rundef.js 1KB
rundef.js 1KB
rundef.js 1KB
runme.log 128KB
runme.log 127KB
runme.log 114KB
runme.log 114KB
runme.log 21KB
runme.log 20KB
runme.log 20KB
runme.log 16KB
vivado.log 10KB
vivado.log 1KB
app.lpr 343B
boot.lpr 343B
multiboot.mcs 2.1MB
elab.opt 180B
elab.opt 180B
vivado.pb 206KB
vivado.pb 184KB
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