Section number Title Page
2.5.3 Inbound ATMUs........................................................................................................................................96
2.5.3.1 Illegal interaction between inbound ATMUs and LAWs......................................................97
Chapter 3
Signal Descriptions
3.1 General overview..........................................................................................................................................................99
3.2 Signals overview...........................................................................................................................................................99
3.3 Configuration signals sampled at reset.........................................................................................................................109
3.4 Output Signal States During Reset...............................................................................................................................111
Chapter 4
Reset, Clocking, and Initialization
4.1 Overview.......................................................................................................................................................................115
4.2 Reset external signal descriptions.................................................................................................................................115
4.2.1 System control signals...............................................................................................................................116
4.2.2 Clock signals..............................................................................................................................................117
4.3 Accessing configuration, control, and status registers..................................................................................................118
4.3.1 Updating CCSRBAR.................................................................................................................................118
4.3.2 Accessing alternate configuration space....................................................................................................119
4.3.3 Boot page translation.................................................................................................................................120
4.3.4 Boot sequencer...........................................................................................................................................120
4.4 Reset Memory Map/Register Definition.......................................................................................................................120
4.4.1 Configuration, control, and status registers base address register (reset_CCSRBAR)..............................121
4.4.2 Alternate configuration base address register (reset_ALTCBAR)............................................................122
4.4.3 Alternate configuration attribute register (reset_ALTCAR)......................................................................122
4.4.4 Boot page translation register (reset_BPTR).............................................................................................123
4.5 Functional description...................................................................................................................................................123
4.5.1 Reset operations.........................................................................................................................................123
4.5.1.1 Soft reset................................................................................................................................124
4.5.1.2 Hard reset...............................................................................................................................124
4.5.2 Power-on reset sequence............................................................................................................................124
P1020 QorIQ Integrated Processor Reference Manual, Rev. 6, 01/2013
Freescale Semiconductor, Inc. 5
