AN4894HowtouseEEPROMemulationonSTM32MCUs资源-CSDN文库

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Introduction

EEPROMs (electrically erasable programmable read only memories) are used for nonvolatile storage of updatable application

data, or to retain small amounts of data in the event of power failure in complex systems. To reduce cost, an external EEPROM

can be replaced by on-chip flash memory, provided that a specific software algorithm is used.

This application note describes the software solution (X-CUBE-EEPROM) for substituting a standalone EEPROM by emulating

the EEPROM mechanism using the on-chip flash memory available on the STM32 series products listed in Table 1. XCUBE-

EEPROM also provides a firmware package including examples showing how to exploit this EEPROM emulation driver (see

Section 5: API and application examples).

For STM32WB series products only, an example that maintains a Bluetooth® Low-Energy connection and communication while

performing EEPROM operations is provided.

For STM32H5 series products, an example using the high-cycle data area for the EEPROM operations is provided.

The emulation method uses at least two flash memory pages, between which the EEPROM emulation code swaps data as they

become filled. This is transparent to the user. The EEPROM emulation driver supplied with this application note has the

following features:

• Lightweight implementation and reduced footprint.

• Simple API consisting of a few functions to format, initialize, read and write data, and clean up flash memory pages.

• At least two flash memory pages to be used for internal data management.

• Clean-up simplified for the user (background page erase).

• Wear-leveling algorithm to increase emulated EEPROM cycling capability.

• Robust against asynchronous resets and power failures.

• Optional protection implementation for flash memory sharing between cores in multicore STM32 devices (for example

STM32WB series).

• Maintenance of cache coherency.

The EEPROM size to be emulated is flexible and only limited by the flash memory size allocated to that purpose.

Table 1. Application products

Type Series

Microcontrollers

STM32C0 series, STM32G0 series, STM32G4 series, STM32H5 series, STM32L4 series, STM32L4+ series,

STM32L5 series, STM32U0 series, STM32U5 series, STM32WB series, STM32WL series

How to use EEPROM emulation on STM32 MCUs

AN4894

Application note

AN4894 - Rev 9 - March 2024

For further information contact your local STMicroelectronics sales office.

www.st.com

2 Main differences between external and emulated EEPROM

EEPROM is a key component of many embedded applications that require nonvolatile storage of data updated

with byte, half-word, or word granularity during runtime. However, microcontrollers used in these systems are very

often based on embedded flash memory. To eliminate components, save PCB space and reduce system costs,

the STM32 flash memory may be used instead of the external EEPROM to store not only code, but also data.

Special software management is required to store data in embedded flash memory. The EEPROM emulation

software scheme depends on many factors, including the required EEPROM reliability, the architecture of the

flash memory used, and the final product requirements, among other parameters.

The main differences between embedded flash memory and external serial EEPROM are the same for any

microcontroller that uses flash memory technology (they are not specific to STM32 series microcontrollers).

One difference is that EEPROMs do not require an erase operation to free up space before data can be written

again. Other major differences are summarized in Table 2.

Table 2. Differences between external and emulated EEPROM

Feature

External EEPROM

(for example, M24C64: I

C serial access

EEPROM)

Emulated EEPROM using on-chip flash memory

Write time

• Random byte write in 4 ms. Word program

time = 16 ms

• Page (32 bytes) write 4 ms. Consecutive

words program time = 500 μs

Word program time: from 90 μs to 838 ms

(1)

Erase time N/A

2 Kbytes page-erase time: for instance, 22 ms

(2)

Memory size From a few Kbytes to 2048 Kbytes

Only limited by the size of flash memory allowed for

EEPROM emulation.

Read access

• Serial: 100 μs

• Random word: 92 μs

• Page: 22.5 μs per byte

Parallel: the access time is from 6 μs to 592 μs

(1)

Endurance

• 4 million cycles at 25°C

• 1.2 million cycles at 85°C

• 600 kilocycles at 125°C

10 kcycles per page at 105°C(2). Using multiple on‑chip

flash memory pages is equivalent to increasing the number

of write cycles. See Section 4.4: Cycling capability:

EEPROM endurance improvement.

Retention

(2)

• 50 years at 125°C

• 100 years at 25°C

• 7 years at 125°C

• 15 years at 105°C

• 30 years at 85°C

1. For further details, refer to Section 5.3: EEPROM emulation timing.

2. Example data for the STM32L4 series. Refer to the datasheet of your STM32 product.

2.1

Difference in write access time

Flash memories have a shorter write access time allowing critical parameters to be stored faster in the emulated

EEPROM than in an external EEPROM in most cases. However, due to the data transfer mechanism, the

emulated EEPROM write access time sometimes becomes significantly higher.

2.2

Programming and erase operations

Unlike flash memories, EEPROMs do not require an erase operation to free up space before writing to a

programmed address. This is a major difference between a standalone EEPROM and an emulated EEPROM

using embedded flash memory.

AN4894

Main differences between external and emulated EEPROM

AN4894 - Rev 9

page 3/31

3 Implementing EEPROM emulation

3.1 Principle

EEPROM emulation can be performed in various ways, considering the flash memory characteristics and final

product requirements. The approach detailed below requires two sets of flash memory pages allocated to

nonvolatile data.

The first set of pages is initially erased and used to store new data and flash memory programming operations are

done sequentially in increasing order of flash memory addresses. Once the first set of pages is full of data, it

needs to be garbage-collected.

The second set of pages collects only the valid data from the first set of pages and the remaining area can be

used to store new data. Once the transfer of valid data to the second set of pages is completed, the first set of

pages can be erased.

Each set of pages can be made up of one or several flash memory pages. For most STM32 series covered by

this document, a header field that occupies the first four 64-bit words (32 bytes) of each page indicates its status,

the exception being the STM32U5 series, where the header occupies the first four 128-bit words (64 bytes).

Each page has five possible states:

• ERASED: the page is empty (initial state).

• RECEIVE: the page used during data transfer to receive data from other full pages.

• ACTIVE: the page is used to store new data.

• VALID: the page is full. This state does not change until all valid data is completely transferred to the

receiving page.

• ERASING: valid data in this page has been transferred. The page is ready to be erased.

Figure 1 shows the page status evolution in the case where each set of pages is made of two pages.

Figure 1. Page status evolution

DT45025V2

Page 0

Init

Write number of variable

elements per page + 1 element

Write 2 * number of variable

elements per page + 1 element

Page 1 Page2 Page 3

ACTIVE ERASED ERASED

VALID ACTIVE ERASED

VALID VALID RECEIVE ERASED

ERASED

Page Transfer Completed with

less than 1 page of valid data

ERASING ERASING ACTIVE ERASED

Page Transfer Completed with

more than 1 page of valid data

ERASING ERASING VALID ACTIVE

Page Erase Completed with

less than one page of valid data

ERASED ERASED ACTIVE ERASED

ERASED ERASED VALID ACTIVE

ERASED

Second set of Flash pagesFirst set of Flash pages

Page Erase Completed with

more than one page of valid data

3.2

Page status valid transitions

The information provided in this paragraph is only useful for users intending to modify the EEPROM emulation

driver. It is not useful for a simple utilization of the driver.

AN4894

Implementing EEPROM emulation

AN4894 - Rev 9

page 5/31

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