A Log Buffer based Flash Translation Layer using
Fully Associative Sector Translation
SANG-WON LEE
Sungkyunkwan University
DONG-JOO PARK
Soongsil University
TAE-SUN CHUNG
Ajou University
DONG-HO LEE
Hanyang University
SANGWON PARK
Hankook University of Foreign Studies
and
HA-JOO SONG
Pukyong National University
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Flash memory is being rapidly deployed as data storage for mobile devices such as PDAs, MP3 players, mobile
phones and digital cameras, mainly because of its low electronic power, non-volatile storage, high performance,
physical stability, and portability. One disadvantage of flash memory is that prewritten data cannot be
dynamically overwritten. Before overwriting prewritten data, a time-consuming erase operation on the used
blocks must precede, which significantly degrades the overall write performance of flash memory. In order to
solve this “erase-before-write” problem, the flash memory controller can be integrated with a software module,
called ‘flash translation layer(FTL)’. Among many FTL schemes available, the log block buffer scheme is
considered to be optimum. With this scheme, a small number of log blocks, a kind of write buffer, can improve
the performance of write operations by reducing the number of erase operations. However, this scheme can
suffer from low space utilization of log blocks. In this paper, we show that there is much room for performance
improvement in the log buffer block scheme, and propose an enhanced log block buffer scheme, called
FAST(Full Associative Sector Translation). Our FAST scheme improves the space utilization of log blocks
using fully associative sector translations for the log block sectors. And, we show empirically that our FAST
scheme outperforms the pure log block buffer scheme.
Categories and Subject Descriptors: B.3.2 [Design Styles]: Mass Storage; B.4.2 [Input/Output Devices]:
Channels and Controllers; D.4.2 [Storage Management]: Secondary Storage
General Terms: Algorithm, Performance
Additional Key Words and Phrases: Flash memory, FTL, Address translation, Log blocks, Associative mapping
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Authors' addresses: S. W. Lee, School of Information and Communications Engineering, Sungkyunkwan
University, Suwon 440-746, Korea. email: swlee@acm.org; D. J. Park, School of Computing, Soongsil
University, Seoul 156-743, Korea. email: djpark@ssu.ac.kr; T. S. Chung, College of Information Technology,
Ajou University, Suwon 443-749, Korea. email: tschung@ajou.ac.kr; D. H. Lee, Department of Computer
Science and Engineering, Hanyang University, Ansan 426-791, Korea. email: dhlee72@cse.hanyang.ac.kr; S.
W. Park, Information Communication Engineering, Hankook University of Foreign Studies, Yongin 449-791,
Korea. email: swpark@hufs.ac.kr; H. J. Song, Division of Electronic, Computer, and Telecommunication,
Pukyong National University, Busan 608-737, Korea. email: hajusong@pknu.ac.kr
This work was supported in part by MIC & IITA through IT Leading R&D Support Project, in part by MIC &
IITA through Oversea Post-Doctoral Support Program 2005, in part by the Ministry of Information and
Communication, Korea under the ITRC support program supervised by the Institute of Information Technology
Assessment, IITA-2005-(C1090-0501-0019), and also supported in part by Seoul R&D Program(10660).
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