loginid=huangchen@vsunmobile.com,time=2016-04-16 12:20:00,ip=113.99.87.197,doctitle=MT6737 LTE Smartphone Application Processor Functional Specification V1.0.pdf,company=VSUN_WCX
© 2016 MediaTek Inc.
This document contains information that is proprietary to MediaTek Inc.
Unauthorized reproduction or disclosure of this information in whole or in part is strictly prohibited.
Version: 1.0
Release date: 2016-01-15
Specifications are subject to change without notice.
MT6737 LTE Smartphone Application
Processor Functional Specification
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loginid=huangchen@vsunmobile.com,time=2016-04-16 12:20:00,ip=113.99.87.197,doctitle=MT6737 LTE Smartphone Application Processor Functional Specification V1.0.pdf,company=VSUN_WCX
MT6737
LTE Smartphone Application Processor
Functional Specification
Confidential A
MediaTek Confidential © 2016 MediaTek Inc.
Page 2 of 288
This document contains information that is proprietary to MediaTek Inc.
Unauthorized reproduction or disclosure of this information in whole or in part is strictly prohibited.
Document Revision History
Revision Date Author Description
1.0 2016-01-15 Yi-Chih Huang First release
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loginid=huangchen@vsunmobile.com,time=2016-04-16 12:20:00,ip=113.99.87.197,doctitle=MT6737 LTE Smartphone Application Processor Functional Specification V1.0.pdf,company=VSUN_WCX
MT6737
LTE Smartphone Application Processor
Functional Specification
Confidential A
MediaTek Confidential © 2016 MediaTek Inc.
Page 3 of 288
This document contains information that is proprietary to MediaTek Inc.
Unauthorized reproduction or disclosure of this information in whole or in part is strictly prohibited.
Table of Contents
Document Revision History ............................................................................................. 2
Table of Contents .............................................................................................................. 3
Preface ............................................................................................................................ 11
1 System Overview .................................................................................................... 12
1.1 Highlighted Features Integrated in MT6737 .......................................................................... 12
1.2 Platform Features ..................................................................................................................... 14
1.3 Modem Features ...................................................................................................................... 16
1.4 Multimedia Features ................................................................................................................ 18
1.5 Connectivity Features ............................................................................................................. 20
1.6 General Descriptions............................................................................................................... 22
2 Product Description ............................................................................................... 24
2.1 Pin Description ........................................................................................................................ 24
2.2 Electrical Characteristic .......................................................................................................... 60
2.3 System Configuration ............................................................................................................. 68
2.4 Power-on Sequence ................................................................................................................. 69
2.5 Analog Baseband ..................................................................................................................... 70
2.6 Package Information ............................................................................................................... 90
2.7 Ordering Information .............................................................................................................. 91
3 MCU and BUS Fabric.............................................................................................. 92
3.1 MCU System ............................................................................................................................ 92
3.2 On-chip Memory Controller ................................................................................................. 100
3.3 External Interrupt Controller ................................................................................................ 103
3.4 System Interrupt Controller ..................................................................................................106
3.5 Infrastructure System Configuration Module ...................................................................... 110
3.6 External Memory Interface ................................................................................................... 112
3.7 DRAM Controller ................................................................................................................... 114
3.8 AP_DMA ................................................................................................................................. 119
3.9 CQDMA ................................................................................................................................... 121
4 Clock and Power Control ..................................................................................... 123
4.1 Top Clock Generator .............................................................................................................. 123
4.2 Top Reset Generate Unit ....................................................................................................... 129
4.3 PMIC Wrapper ....................................................................................................................... 132
4.4 Frequency Hopping Controller ............................................................................................. 133
5 Peripherals .......................................................................................................... 135
5.1 Pericfg Controller ................................................................................................................... 135
5.2 GPIO Control .......................................................................................................................... 137
5.3 Keypad Scanner ...................................................................................................................... 138
5.4 UART ...................................................................................................................................... 142
5.5 USB 2.0 High Speed Dual-Role Controller ........................................................................... 145
5.6 USBPHY Register File ............................................................................................................ 150
5.7 SPI Interface Controller ......................................................................................................... 153
5.8 MSDC Controller .................................................................................................................... 157
5.9 AUXADC .................................................................................................................................160
5.10 I2C/SCCB Controller ............................................................................................................. 163
5.11 Pulse-Width Modulation (PWM) .......................................................................................... 167
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loginid=huangchen@vsunmobile.com,time=2016-04-16 12:20:00,ip=113.99.87.197,doctitle=MT6737 LTE Smartphone Application Processor Functional Specification V1.0.pdf,company=VSUN_WCX
MT6737
LTE Smartphone Application Processor
Functional Specification
Confidential A
MediaTek Confidential © 2016 MediaTek Inc.
Page 4 of 288
This document contains information that is proprietary to MediaTek Inc.
Unauthorized reproduction or disclosure of this information in whole or in part is strictly prohibited.
5.12 General-Purpose Timer (GPT) .............................................................................................. 169
5.13 Thermal Controller ................................................................................................................ 171
5.14 IRTX ....................................................................................................................................... 180
5.15 IrDA ........................................................................................................................................ 185
5.16 Audio System .......................................................................................................................... 186
6 Multimedia Subsystem ......................................................................................... 190
6.1 Multimedia Subsystem Configuration ..................................................................................190
6.2 SMI_COMMON ..................................................................................................................... 193
6.3 SMI_LARB ............................................................................................................................. 195
6.4 CAM ........................................................................................................................................ 197
6.5 SENINF_TOP (Sensor Interface).......................................................................................... 198
6.6 MDP_RDMA .......................................................................................................................... 199
6.7 MDP RSZ ............................................................................................................................... 203
6.8 MDP ROT_DMA (Multimedia Data Path-Rotation DMA) .................................................210
6.9 Display 2D Sharpness ............................................................................................................ 217
6.10 DISP_OVL .............................................................................................................................. 221
6.11 DIPS RDMA (Display Read Direct Memory Access) .......................................................... 224
6.12 DISP_WDMA ........................................................................................................................ 228
6.13 Color Processor ...................................................................................................................... 231
6.14 DIPS CCORR (Display Color Correction Engine) ............................................................... 236
6.15 DIPS AAL (Display Adaptive Ambient Light Controller) ................................................... 238
6.16 DIPS GAMMA (Display GAMMA Processing Engine) ....................................................... 240
6.17 DISP DITHER ........................................................................................................................ 241
6.18 DISPLAY PWM Generator.................................................................................................... 242
6.19 DPI (Digital Parallel Interface) ............................................................................................ 243
6.20 Display Serial Interface ......................................................................................................... 246
6.21 MIPI TX Configuration Module ........................................................................................... 262
6.22 JPEG Encoder ....................................................................................................................... 266
6.23 Video Decoder ....................................................................................................................... 269
6.24 MPEG-4 Video Encoder ......................................................................................................... 281
6.25 MFG ....................................................................................................................................... 282
6.26 Multimedia Memory Management Unit (M4U).................................................................. 284
7 Analog Baseband.................................................................................................. 287
7.1 AP Mixedsys .......................................................................................................................... 287
Lists of Tables
Table 2-1. Pin coordinate (using LPDDR3) ............................................................................................... 25
Table 2-2. Acronym for pin type ................................................................................................................ 30
Table 2-3. Detailed pin description (using LPDDR3) .............................................................................. 30
Table 2-4. Acronym for the table of state of pins ...................................................................................... 39
Table 2-5. State of pins ............................................................................................................................... 40
Table 2-6. Acronym for pull-up and pull-down type ................................................................................ 44
Table 2-7. Pin multiplexing, capability and settings ................................................................................ 44
Table 2-8. Absolute maximum ratings for power supply ......................................................................... 60
Table 2-9. Recommended operating conditions for power supply ........................................................... 61
Table 2-10. LPDDR3 AC timing parameter table of external memory interface .................................... 63
Table 2-11. LPDDR2 AC timing parameter table of external memory interface ..................................... 66
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loginid=huangchen@vsunmobile.com,time=2016-04-16 12:20:00,ip=113.99.87.197,doctitle=MT6737 LTE Smartphone Application Processor Functional Specification V1.0.pdf,company=VSUN_WCX
MT6737
LTE Smartphone Application Processor
Functional Specification
Confidential A
MediaTek Confidential © 2016 MediaTek Inc.
Page 5 of 288
This document contains information that is proprietary to MediaTek Inc.
Unauthorized reproduction or disclosure of this information in whole or in part is strictly prohibited.
Table 2-12. Mode selection ......................................................................................................................... 68
Table 2-13. Constant tied pins ................................................................................................................... 68
Table 2-14. Baseband downlink specifications .......................................................................................... 71
Table 2-15. Baseband downlink specifications .......................................................................................... 73
Table 2-16. LTE_BBTX specifications ........................................................................................................ 75
Table 2-17. C2K_BBTX specifications ........................................................................................................76
Table 2-18. ETDAC specifications .............................................................................................................. 77
Table 2-19. APC-DAC specifications .......................................................................................................... 78
Table 2-20. Definitions of AUXADC channels ...........................................................................................79
Table 2-21. AUXADC specifications .......................................................................................................... 80
Table 2-22. Clock squarer specifications .................................................................................................... 81
Table 2-23. ARMPLL specifications .......................................................................................................... 84
Table 2-24. MAINPLL specifications ........................................................................................................ 84
Table 2-25. MMPLL specifications ............................................................................................................ 84
Table 2-26. UNIVPLL specifications ......................................................................................................... 85
Table 2-27. MSDCPLL specifications ........................................................................................................ 85
Table 2-28. WPLL specifications ............................................................................................................... 85
Table 2-29. WHPLL specifications ............................................................................................................ 86
Table 2-30. C2KCPPLL specifications ....................................................................................................... 86
Table 2-31. C2KDSPPLL specifications ..................................................................................................... 86
Table 2-32. CR4PLL specifications ............................................................................................................ 87
Table 2-33. VENCPLL specifications ........................................................................................................ 87
Table 2-34. TVDPLL specifications ........................................................................................................... 87
Table 2-35. LTEDSPPLL specifications ..................................................................................................... 88
Table 2-36. APLL1 specifications ............................................................................................................... 88
Table 2-37. Temperature sensor specifications ........................................................................................ 89
Table 2-38. Thermal operating specifications .......................................................................................... 90
Table 3-1. Interrupt request list for Cortex-A53 ....................................................................................... 93
Table 3-2. Memory map of on-chip memory controller ......................................................................... 100
Table 3-3. External interrupt request signal connection ....................................................................... 104
Table 3-4. Definitions of domains ........................................................................................................... 104
Table 3-5. EINT table ............................................................................................................................... 104
Table 3-6. DRAM bus signal list (refer to DRAMC side) ......................................................................... 114
Table 3-7. DRAM bus command truth table (LPDDR2/3) ..................................................................... 115
Table 3-8. Relationship between engines and devices ............................................................................ 119
Table 4-1. PLL related control................................................................................................................... 126
Table 4-2. Clock gating settings ................................................................................................................ 126
Table 5-1. SPI controller interface ............................................................................................................ 153
Table 5-2. AUXADC: feature list .............................................................................................................. 160
Table 5-3. AUXADC: design partition ...................................................................................................... 162
Table 5-4. Operation mode of GPT ........................................................................................................... 169
Table 5-5. Interface of audio sys .............................................................................................................. 188
Table 6-1. Base addresses of SMI local arbiters ....................................................................................... 196
Table 6-2. Input format list ....................................................................................................................... 199
Table 6-3. Functional specifications of resizers ...................................................................................... 203
Table 6-4. Hardware specifications of resizers ....................................................................................... 204
Table 6-5. ROT_DMA OFST_ADDR settings for rotation/flip .............................................................. 212
Table 6-6. VIDO UV SEL for YUV420 format cooperated with CRSP ................................................... 213
Table 6-7. Data map ................................................................................................................................. 244
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