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GigaDevice Semiconductor Inc.

GD32F103xx

Arm

Cortex

-M3 32-bit MCU

Datasheet

Revision 2.15

(Jun. 2023)

    GD32F103xx Datasheet 

 
Table of Contents 
Table of Contents................................................................................................................. 1 
List of Figures ...................................................................................................................... 4 
List of Tables ........................................................................................................................ 5 
 General description ...................................................................................................... 7 
 Device overview ............................................................................................................ 8 
1. Device information ....................................................................................................... 8 
2. Block diagram............................................................................................................. 12 
3. Pinouts and pin assignment....................................................................................... 14 
4. Memory map ............................................................................................................... 18 
5. Clock tree .................................................................................................................... 22 
6. Pin definitions............................................................................................................. 23 
6.1.  GD32F103Zx LQFP144 pin definitions ......................................................................23 
6.2.  GD32F103Vx LQFP100 pin definitions ......................................................................32 
6.3.  GD32F103Rx LQFP64 pin definitions ........................................................................39 
6.4.  GD32F103Cx LQFP48 pin definitions ........................................................................43 
6.5.  GD32F103Tx QFN36 pin definitions..........................................................................46 
 Functional description ............................................................................................... 48 
1. Arm
®
 Cortex
®
-M3 core ................................................................................................ 48 
2. On-chip memory ......................................................................................................... 48 
3. Clock, reset and supply management........................................................................ 49 
4. Boot modes................................................................................................................. 49 
5. Power saving modes .................................................................................................. 51 
6. Analog to digital converter (ADC) .............................................................................. 51 
7. Digital to analog converter (DAC) .............................................................................. 52 
8. DMA............................................................................................................................. 52 
9. General-purpose inputs/outputs (GPIOs) .................................................................. 52 
10.  Timers and PWM generation ............................................................................... 53 
11.  Real time clock (RTC) .......................................................................................... 54 
12.  Inter-integrated circuit (I2C)................................................................................. 54 
13.  Serial peripheral interface (SPI)........................................................................... 55 

    GD32F103xx Datasheet 

 
14.  Universal synchronous asynchronous receiver transmitter (USART) ............... 55 
15.  Inter-IC sound (I2S) .............................................................................................. 55 
16.  Secure digital input and output card interface (SDIO) ........................................ 56 
17.  Universal serial bus full-speed device (USBD) ................................................... 56 
18.  Controller area network (CAN) ............................................................................ 56 
19.  External memory controller (EXMC).................................................................... 56 
20.  Debug mode ......................................................................................................... 57 
21.  Package and operation temperature ................................................................... 57 
 Electrical characteristics ........................................................................................... 58 
1. Absolute maximum ratings ........................................................................................ 58 
2. Operating conditions characteristics......................................................................... 58 
3. Power consumption.................................................................................................... 60 
4. EMC characteristics.................................................................................................... 68 
5. Power supply supervisor characteristics .................................................................. 69 
6. Electrical sensitivity ................................................................................................... 70 
7. External clock characteristics .................................................................................... 71 
8. Internal clock characteristics ..................................................................................... 73 
9. PLL characteristics..................................................................................................... 75 
10.  Memory characteristics ....................................................................................... 76 
11.  NRST pin characteristics ..................................................................................... 77 
12.  GPIO characteristics ............................................................................................ 77 
13.  ADC characteristics ............................................................................................. 81 
14.  Temperature sensor characteristics ................................................................... 83 
15.  DAC characteristics ............................................................................................. 83 
16.  I2C characteristics ............................................................................................... 84 
17.  SPI characteristics ............................................................................................... 85 
18.  I2S characteristics ............................................................................................... 86 
19.  USART characteristics......................................................................................... 88 
20.  SDIO characteristics ............................................................................................ 88 
21.  CAN characteristics ............................................................................................. 89 
22.  USBD characteristics........................................................................................... 89 

    GD32F103xx Datasheet 
4 
 
List of Figures 
Figure 2-1. GD32F103x4/6/8/B block diagram .............................................................................12 
Figure 2-2. GD32F103xC/D/E/F/G/I/K block diagram ....................................................................13 
Figure 2-3. GD32F103Zx LQFP144 pinouts .................................................................................14 
Figure 2-4. GD32F103Vx LQFP100 pinouts .................................................................................15 
Figure 2-5. GD32F103Rx LQFP64 pinouts ..................................................................................16 
Figure 2-6. GD32F103Cx LQFP48 pinouts ..................................................................................16 
Figure 2-7. GD32F103Tx QFN36 pinouts ....................................................................................17 
Figure 2-8. GD32F103xx clock tree ............................................................................................22 
Figure 4-1. Recommended power supply decoupling capacitors
(1) (2)
 ...........................................59 
Figure 4-2. Typical supply current consumption in Run mode (For GD32F103x4/6/8/B devices).....67 
Figure 4-3. Typical supply current consumption in Run mode (For GD32F103xC/D/E/F/G/I/K 
devices)...................................................................................................................................67 
Figure 4-4. Typical supply current consumption in Sleep mode (For GD32F103x4/6/8/B devices) ..67 
Figure 4-5. Typical supply current consumption in Sleep mode (For GD32F103xC/D/E/F/G/I/K 
devices)...................................................................................................................................68 
Figure 4-6. Recommended external NRST pin circuit
(1)
................................................................77 
Figure 4-7. I2C bus timing diagram ............................................................................................85 
Figure 4-8. SPI timing diagram - master mode ............................................................................86 
Figure 4-9. SPI timing diagram - slave mode ..............................................................................86 
Figure 4-10. I2S timing diagram - master mode...........................................................................87 
Figure 4-11. I2S timing diagram - slave mode .............................................................................88 
Figure 4-12. USBD timings: definition of data signal rise and fall time .........................................90 
Figure 5-1. LQFP144 package outline ........................................................................................94 
Figure 5-2. LQFP144 recommended footprint .............................................................................95 
Figure 5-3. LQFP100 package outline ........................................................................................96 
Figure 5-4. LQFP100 recommended footprint .............................................................................97 
Figure 5-5. LQFP64 package outline ..........................................................................................98 
Figure 5-6. LQFP64 recommended footprint...............................................................................99 
Figure 5-7. LQFP48 package outline ........................................................................................ 100 
Figure 5-8. LQFP48 recommended footprint............................................................................. 101 
Figure 5-9. QFN36 package outline .......................................................................................... 102 
Figure 5-10. QFN36 recommended footprint............................................................................. 103 
   