PEX8605-AIC RDK
PLX Technology
Hardware Reference Manual
PEX8605-AIC Rapid Development Kit
© PLX Technology, www.plxtech.com Page 1 of 23 4Aug11, Version 1.0
PEX8605-AIC RDK
Preface
Notice
This document contains PLX Confidential and Proprietary information. The contents of this document may not be copied
nor duplicated in any form, in whole or in part, without prior written consent from PLX Technology, Inc.
PLX provides the information and data included in this document for your benefit, but it is not possible to entirely verify
and test all the information, in all circumstances, particularly information relating to non-PLX manufactured products.
PLX makes neither warranty nor representation relating to the quality, content, or adequacy of this information. The
information in this document is subject to change without notice. Although every effort has been made to ensure the
accuracy of this manual, PLX shall not be liable for any errors, incidental, or consequential damages in connection with
the furnishing, performance, or use of this manual or examples herein. PLX assumes no responsibility for damage or
loss resulting from the use of this manual, for loss or claims by third parties, which may arise through the use of the
RDK, or for any damage or loss caused by deletion of data as a result of malfunction or repair.
About This Manual
This document describes the PLX PEX8605-AIC RDK, a Rapid Development Kit, from a hardware perspective. It
contains a description of all major functional circuit blocks on the board and also is a reference for the creation of
software for this product. This manual also includes complete schematics and bill of materials.
Revision History
Date Version Comments
August
2011
1.0 Initial Release
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PEX8605-AIC RDK
Table Of Contents
1 GENERAL INFORMATION .......................................................................................................... 5
1.1 PEX8605 Features ................................................................................................................................................... 7
1.2 PEX8605 AIC RDK Features ................................................................................................................................. 8
1.3 Getting Started ......................................................................................................................................................... 9
2 PEX8605 RDK HARDWARE ARCHITECTURE ........................................................................ 10
2.1 Architecture Block Diagram ................................................................................................................................. 10
2.2 Board Components ................................................................................................................................................ 11
2.3 PEX8605 PCI Express Switch .............................................................................................................................. 13
2.4 PCI Express Upstream Port Connection ............................................................................................................. 13
2.5 PCI Express Downstream Port Connections ....................................................................................................... 13
2.6 Hardware Strap Pin Dipswitches ......................................................................................................................... 13
2.7 Dipswitch Setting Tables ....................................................................................................................................... 14
2.8 Power Circuitry ..................................................................................................................................................... 16
2.9 Serial EEPROM Interface .................................................................................................................................... 16
2.10 JTAG Interface .................................................................................................................................................. 16
2.11 I2C/SMBUS Interface ........................................................................................................................................ 17
2.12 FATAL_ERR#, and INTA# .............................................................................................................................. 18
2.13 Reference Clock Circuitry ................................................................................................................................. 18
2.14 Reset Circuitry ................................................................................................................................................... 18
2.15 Port Good Indicator LEDs ................................................................................................................................ 19
2.16 PCIe Protocol Debug ......................................................................................................................................... 20
2.17 WAKE# and Vaux Support .............................................................................................................................. 20
3 RDK CONFIGURATIONS .......................................................................................................... 21
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PEX8605-AIC RDK
3.1 Default Strap Pin Settings Diagram ..................................................................................................................... 21
3.2 Hardware Strap Pins ............................................................................................................................................. 22
3.3 Configuration Modules ......................................................................................................................................... 22
3.4 Hardware Jumpers ................................................................................................................................................ 23
Figures
Figure1.PEX8605 RDK Front View__________________________________________________________________________ 6
Figure2.GettingStarted ____________________________________________________________________________________ 9
Figure3.RDKArchitecture__________________________________________________________________________________ 10
Figure4.RDKComponentLocations___________________________________________________________________________ 12
Figure5.ConfigurationDipswitches___________________________________________________________________________ 13
Figure6.EEPROMinSocket_________________________________________________________________________________ 16
Figure7.PinAssignmentofJTAGPortHeader,JP1 ______________________________________________________________ 17
Figure8.I2CPlugOrientation________________________________________________________________________________ 17
Figure9.PinAssignmentofI2CConnectorJP2__________________________________________________________________ 18
Figure10.FatalErrorandINTA#LEDs_________________________________________________________________________ 18
Figure11.ManualPERST#button ____________________________________________________________________________ 19
Figure12LaneGoodLEDs __________________________________________________________________________________ 19
Figure13:Midbus2.0ProbeFootprint_________________________________________________________________________ 20
Figure14.DefaultDipswitchSettings__________________________________________________________________________ 21
Tables
Table1.PEX8605PortConfigurations __________________________________________________________________________ 5
Table2ComponentTable___________________________________________________________________________________ 11
Table3.SW1Functions_____________________________________________________________________________________ 14
Table4.SW2Functions_____________________________________________________________________________________ 15
Table5.SW3Functions_____________________________________________________________________________________ 15
Table6.SW4Functions_____________________________________________________________________________________ 15
Table7.PortIndicatorBlinkPattern __________________________________________________________________________ 19
Table8.PEX8605StrapPortCfgSettings________________________________________________________________________ 22
Table9.ConfigurationModuleDescription_____________________________________________________________________ 22
Table10.PEX8605RDKJumperSettings _______________________________________________________________________ 23
© PLX Technology, www.plxtech.com Page 4 of 23 4Aug11, Version 1.0
PEX8605-AIC RDK
1 GeneralInformation
ThePEX8605RDKisaPLXRapidDevelopmentKitintended primarilyforusebyPLXcustomersforsiliconevaluation
anddesignreference.TheformfactorisbasedonthePCIExpressCardElectromechanicalspecification.Theboardis
designedtoworkbyplugginginternallyintoaPCIExpresscompliantmotherboard.Figure1showstheboardoutline
andcomponentplacement.
ThePEX8605RDKhas1x4upstreamportconnectorand3x16PCIeconnectors.Theupstreamedgeconnectorhas1
or2PCIeGen2laneselectricallyconnectedtoit,andthedownstreamPCIeconnectorshave1 PCIeGen2laneeach
electricallyconnectedtoitdependingontheinstalledconfigurationmodule.
ThePEX8605RDKsupportstheuseofoneconfigurationmoduleslottoprovideflexibilityintheroutingofPCIelane1
toeitherthex4PCIeedgeconnectorortooneofthePCIeslots.TheConfigurationModuleenablestheRDKtosupport
thefollowingportconfigurations:
Table1.PEX8605PortConfigurations
PEX8605 PortConfiguration
0h x1,x1,x1,x1
1h x2,x1,x1
ThePEX8605RDKmeetstheROHSguidelinesforelectroniccomponents,andhardware.
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