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74LS09.pdf
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TL/F/6348
54LS09/DM54LS09/DM74LS09 Quad 2-Input AND Gates with Open-Collector Outputs
June 1989
54LS09/DM54LS09/DM74LS09
Quad 2-Input AND Gates with Open-Collector Outputs
General Description
This device contains four independent gates each of which
performs the logic AND function. The open-collector out-
puts require external pull-up resistors for proper logical op-
eration.
Features
Y
Alternate Military/Aerospace device (54LS09) is avail-
able. Contact a National Semiconductor Sales Office/
Distributor for specifications.
Pull-Up Resistor Equations
R
MAX
e
V
CC
(Min)
b
V
OH
N
1
(I
OH
)
a
N
2
(I
IH
)
R
MIN
e
V
CC
(Max)
b
V
OL
I
OL
b
N
3
(I
IL
)
Where: N
1
(I
OH
)
e
total maximum output high current for all
outputs tied to pull-up resistor
N
2
(I
IH
)
e
total maximum input high current for all
inputs tied to pull-up resistor
N
3
(I
IL
)
e
total maximum input low current for all
inputs tied to pull-up resistor
Connection Diagram
Dual-In-Line Package
TL/F/6348–1
Order Number 54LS09DMQB, 54LS09FMQB, DM54LS09J, DM54LS09W, DM74LS09M or DM74LS09N
See NS Package Number E20A, J14A, M14A, N14A or W14B
Function Table
Y
e
AB
Inputs Output
AB Y
LL L
LH L
HL L
HH H
H
e
High Logic Level
L
e
Low Logic Level
C
1995 National Semiconductor Corporation RRD-B30M105/Printed in U. S. A.
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