The 8-bit AT89C51 CHMOS microcontrollers are designed to handle high-speed calc
ulations and fast input/output operations. MCS 51 microcontrollers are typically used
for high-speed event control systems. Commercial applications include modems, mot
or-control systems, printers, photocopiers, air conditioner control systems, disk drives,
and medical instruments. The automotive industry use MCS 51 microcontrollers in e
ngine-control systems, airbags, suspension systems, and antilock braking systems (AB
S). The AT89C51 is especially well suited to applications that benefit from its process
ing speed and enhanced on-chip peripheral functions set, such as automotive power-tr
ain control, vehicle dynamic suspension, antilock braking, and stability control applic
ations. Because of these critical applications, the market requires a reliable cost-effect
ive controller with a low interrupt latency response, ability to service the high number
of time and event driven integrated peripherals needed in real time applications, and a
CPU with above average processing power in a single package. The financial and leg
al risk of having devices that operate unpredictably is very high. Once in the market, p
articularly in mission critical applications such as an autopilot or anti-lock braking sys
tem, mistakes are financially prohibitive. Redesign costs can run as high as a $500K,
much more if the fix means 2 back annotating it across a product family that share the
same core and/or peripheral design flaw. In addition, field replacements of componen
ts is extremely expensive, as the devices are typically sealed in modules with a total v
alue several times that of the component. To mitigate these problems, it is essential th
at comprehensive testing of the controllers be carried out at both the component level
and system level under worst case environmental and voltage conditions. This comple
te and thorough validation necessitates not only a well-defined process but also a prop
er environment and tools to facilitate and execute the mission successfully. Intel Chan
dler Platform Engineering group provides post silicon system validation (SV) of vario
us micro-controllers and processors. The system validation process can be broken into
three major parts. The type of the device and its application requirements determine
which types of testing are performed on the device.
1.2 The AT89C51 provides the following standard features
4Kbytes of Flash, 128 bytes of RAM, 32 I/O lines, two 16-bittimer/counters, a five ve
ctor two-level interrupt architecture, a full duple ser-ial port, on-chip oscillator and cl
ock circuitry. In addition, the AT89C51 is designed with static logic for operation do
wn to zero frequency and supports two software selectable power saving modes. The I
dle Mode stops the CPU while allowing the RAM, timer/counters, serial port and inter
rupt sys -tem to continue functioning. The Power-down Mode saves
the RAM contents but freezes the oscil–
lator disabling all other chip functions until the next hardware reset.
1.3Pin Description
VCC Supply voltage.
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