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LK460D3LA8T_LD-K21Z26 -显示屏技术规格书.pdf
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嵌入式LCD液晶显示屏技术手册,规格书SPEC,产品规格书。
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LD-K21Z26-1
1. Application
This specification applies to the color 46.0” TFT-LCD module LK460D3LA8T
* This specification is proprietary products of SHARP CORPORATION (“SHARP”) and includes materials protected
under copyright of SHARP. Do not reproduce or cause any third party to reproduce them in any form or by any
means, electronic or mechanical, for any purpose, in whole or in part, without the express written permission of
SHARP.
* In case of using the device for applications such as control and safety equipment for transportation (aircraft, trains,
automobiles, etc.), rescue and security equipment and various safety related equipment which require higher
reliability and safety, take into consideration that appropriate measures such as fail-safe functions and redundant
system design should be taken.
* Do not use the device for equipment that requires an extreme level of reliability, such as aerospace applications,
telecommunication equipment (trunk lines), nuclear power control equipment and medical or other equipment for
life support.
* SHARP assumes no responsibility for any damage resulting from the use of the device that does not comply with
the instructions and the precautions specified in these specification.
* Contact and consult with a SHARP sales representative for any questions about this device.
2. Overview
This module is a color active matrix LCD module incorporating amorphous silicon TFT (Thin Film Transistor). It is
composed of a color TFT-LCD panel, driver ICs, control circuit, power supply circuit, LED drive circuit and back
light system etc. Graphics and texts can be displayed on a 1920
×
RGB
×
1080 dots panel with one billion colors by
using 8bit + 2FRC LVDS (L
ow Voltage Differential Signaling) to interface, +12V of DC supply voltages.
This module also includes the LCD-PWB module to drive the LED. (
±
120mA of DC supply current)
And in order to improve the response time of LCD, this module applies the Over Shoot driving (O/S driving)
technology for the control circuit .In the O/S driving technology, signals are being applied to the Liquid Crystal
according to a pre-fixed process as an image signal of the present frame when a difference is found between image
signal of the previous frame and that of the current frame after comparing them.
With this technology, image signals can be set so that liquid crystal response completes within one frame. As a
result, motion blur reduces and clearer display performance can be realized.
This LCD module also adopts Double-Frame Rate driving method including FRC (Frame Rate Control) function
on the control circuit. Therefore the input signal to this LCD module is Single Frame Rate, but the output is
Double-Frame Rate picture (inserting the intermediate image which is generated by the FRC).
With combination of these technologies, motion blur can be reduced and clearer display performance can be
realized.
3. Mechanical Specifications
Parameter Specifications Unit
116.8 (Diagonal) cm
Display size
46.0
(
Diagonal
)
inch
Active area 1018.08(H) x 572.67 (V) mm
Pixel Format
1920(H) x 1080(V)
(
1pixel = R + G + B dot
)
pixel
Pixel pitch 0.53025(H) x 0.53025 (V) mm
Pixel configuration R, G, B vertical stripe
Display mode Normally black
Unit Outline Dimensions (*1) 1093 (W) x 664 (H) x 13.5(D) mm
Mass 12.0 kg
Surface treatment
Clear LR (Low Reflection coating)
Hard coating: 2H and more
(*1) Outline dimensions are shown in Fig.17 (excluding protruding portion)
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LD-K21Z26-2
4. Input Terminals
4.1. TFT panel driving
CN1 (Interface signals and +12V DC power supply) (Shown in Fig.1)
Using connector : FI-RNE51SZ- HF (Japan Aviation Electronics Ind., Ltd.)
Mating connector : FI-RE51HL, FI-RE51CL (Japan Aviation Electronics Ind., Ltd.)
Mating LVDS transmitter : THC63LVD1023 or equivalent device
Pin No. Symbol Function Remark
1 VCC +12V Power Supply
2
VCC +12V Power Supply
3
VCC +12V Power Supply
4
VCC +12V Power Supply
5
VCC +12V Power Supply
6
Open
7 GND
8 GND
9 GND
10 AIN0-
Aport (-)LVDS CH0 differential data input
11 AIN0+ Aport (+)LVDS CH0 differential data input
12
AIN1- Aport (-)LVDS CH1 differential data input
13
AIN1+ Aport (+)LVDS CH1 differential data input
14
AIN2- Aport (-)LVDS CH2 differential data input
15
AIN2+ Aport (+)LVDS CH2 differential data input
16
GND
17
ACK- Aport LVDS Clock signal(-)
18
ACK+ Aport LVDS Clock signal(+)
19
GND
20
AIN3- Aport (-)LVDS CH3 differential data input
21
AIN3+ Aport (+)LVDS CH3 differential data input
22
AIN4- Aport (-)LVDS CH4 differential data input
23
AIN4+ Aport (+)LVDS CH4 differential data input
24
GND
25
BIN0- Bport (-)LVDS CH0 differential data input
26
BIN0+ Bport (+)LVDS CH0 differential data input
27
BIN1- Bport (-)LVDS CH1 differential data input
28
BIN1+ Bport (+)LVDS CH1 differential data input
29
BIN2- Bport (-)LVDS CH2 differential data input
30
BIN2+ Bport (+)LVDS CH2 differential data input
31
GND
32
BCK- Bport LVDS Clock signal(-)
33
BCK+ Bport LVDS Clock signal(+)
34
GND
35
BIN3- Bport (-)LVDS CH3 differential data input
36
BIN3+ Bport (+)LVDS CH3 differential data input
37
BIN4- Bport (-)LVDS CH4 differential data input
38
BIN4+ Bport (+)LVDS CH4 differential data input
39
GND
40
I2C_SCL I2C CLK
41
I2C_SDA I2C Data
42
Open
43
B_INT I2C bus enable(H:enable, L:disable) [Note 1] Pull down : (GND)
44
PANEL_SEL (PANEL Sel Signal) [Note 2]
45
FRC_PWR_CTRL
Power on sequence(DC/DC On Signal) Pull down : (GND)
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LD-K21Z26-3
46
SA_MODE SA Mode Sel Signal
(L:Set mode, H:Stand alone(SA) mode)
Pull up 3.3V
47
PANEL_ON Power on sequence Pull down : (GND)
48
FRC_RST FRC IC RESET Pull down : (GND)
49
Open Open
50
TCON_RDY TCON ready signal (H:OK, L:NG)
51
Open
[Note] GND of a liquid crystal panel drive part has connected with a module chassis.
CN2 (+12V DC power supply)
Using connector : SM04B-PASS (J.S.T.Mfg Co., Ltd.)
Mating connector : (PAP-04V-S) (J.S.T.Mfg Co., Ltd.)
Pin No. Symbol Function Remark
1 VCC +12V Power Supply
2
VCC +12V Power Supply
3
GND
4 GND
[Note 1] B_INT
Pin No. Symbol Function
43 B_INT Select I2C Bus
0: FRC is I2C master. (EEPROM access mode )
1: FRC is I2C slave.(
μ
com mode(SA_MODE = ‘1’))
[Note 2] PANEL_SEL
R1 Panel type Address
Open Standard Slave address and Power sequence are standard.
Fig.1BlockdiagramofPANELSEL
μ
com
R1
47k
Tcon board
Set board
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LD-K21Z26-4
4.2. LVDS Data order
LVDS Mapping
Data [JEIDA]
TA0 R4
TA1 R5
TA2 R6
TA3 R7
TA4 R8
TA5 R9
TA6 G4
TB0 G5
TB1 G6
TB2 G7
TB3 G8
TB4 G9
TB5 B4
TB6 B5
TC0 B6
TC1 B7
TC2 B8
TC3 B9
TC4 HSYNC
TC5 VSYNC
TC6 DE (*)
TD0 R2
TD1 R3
TD2 G2
TD3 G3
TD4 B2
TD5 B3
TD6 N/A
TE0 R0
TE1 R1
TE2 G0
TE3 G1
TE4 B0
TE5 B1
TE6 N/A
NA:Not Available
(*)Since the display position is prescribed by the rise of DE(Display Enable)signal, please do not fix DE
signal during operation at ”High”.
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