十进制
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;
ENTITY CNT10 IS
PORT(CLK,RST,EN:IN STD_LOGIC;
CQ:OUT STD_LOGIC_VECTOR(3 DOWNTO 0);
COUT:OUT STD_LOGIC);
END CNT10;
ARCHITECTURE behav OF CNT10 IS
BEGIN
PROCESS( CLK,RST,EN)
VARIABLE CQI:STD_LOGIC_VECTOR(3 DOWNTO 0);
BEGIN
IF RST='1' THEN CQI:=(OTHERS=>'0');
ELSIF CLK'EVENT AND CLK='1' THEN
IF EN='1' THEN
IF CQI="1001" THEN
CQI:=(OTHERS=>'0');COUT<='1';
ELSE CQI:=CQI+1;COUT<='0';
END IF;
END IF;
END IF;
CQ<=CQI;
END PROCESS;
END behav;
100 进制
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;
ENTITY CNT100 IS
PORT(CLK,RST,EN:IN STD_LOGIC;
CQA,CQB:OUT STD_LOGIC_VECTOR(3 DOWNTO 0);
COUT:OUT STD_LOGIC);
END CNT100;
ARCHITECTURE behav OF CNT100 IS
BEGIN
PROCESS( CLK,RST,EN)
VARIABLE CQIA,CQIB:STD_LOGIC_VECTOR(3 DOWNTO 0);
BEGIN
IF RST='1' THEN CQIA:=(OTHERS=>'0');CQIB:=(OTHERS=>'0');COUT<='0';
ELSIF CLK'EVENT AND CLK='1' THEN
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