RTL8153原理图

RTL8153原理图

366b_q_z00m_8dp_mobile_lpddr4x.pdf

Features • Ultra-low-voltage core and I/O power supplies – VDD1 = 1.70–1.95V; 1.80V nominal – VDD2 = 1.06–1.17V; 1.10V nominal – VDDQ = 0.57–0.65V; 0.60V nominal • Frequency range – 1866–10 MHz (data rate range: 3733–20 Mb/s/ pin) • 16n prefetch DDR architecture • 8 internal banks per channel for concurrent opera- tion • Single-data-rate CMD/ADR entry • Bidirectional/differential data strobe per byte lane • Programmable READ and WRITE latencies (RL/WL) • Programmable and on-the-fly burst lengths (BL = 16, 32) • Directed per-bank refresh for concurrent bank op- eration and ease of command scheduling • Up to 7.5 GB/s per die • On-chip temperature sensor to control self refresh rate • Partial-array self refresh (PASR) • Selectable output drive strength (DS) • Clock-stop capability • RoHS-compliant, “green” packaging • Programmable VSS (ODT) termination

Realtek8口千兆交换机芯片RTL8370N 带原理图与PCB

 RTL8370N-VB: Single-chip 8-port gigabit non-blocking switch architecture  Embedded 8-port 10/100/1000Base-T PHY  Each port supports full duplex 10/100/1000M connectivity (half duplex only supported in 10/100M mode)  Full-duplex and half-duplex operation with IEEE 802.3x flow control and backpressure  Supports 9216-byte jumbo packet length forwarding at wire speed  Supports Realtek Cable Test (RTCT) function  Supports 96-entry ACL Rules  Search keys support physical port, Layer2, Layer3, and Layer4 information  Actions support mirror, redirect, dropping, priority adjustment, traffic policing, CVLAN decision, and SVLAN assignment  Supports 5 types of user defined ACL rule format for 64 ACL rules  Optional per-port enable/disable of ACL function  Optional setting of per-port action to take when ACL mismatch  Supports IEEE 802.1Q VLAN  Supports 4K VLANs and 32 Extra Enhanced VLANs  Supports Un-tag definition in each VLAN  Supports VLAN policing and VLAN forwarding decision  Supports Port-based, Tag-based, and Protocol-based VLAN  Up to 4 Protocol-based VLAN entries  Supports per-port and per-VLAN egress VLAN tagging and un-tagging  Supports IVL, SVL, and IVL/SVL  Supports 4096-entry MAC address table with 4-way hash algorithm  Up to 4096 L2/L3 Filtering Database  Supports Spanning Tree port behavior configuration  IEEE 802.1w Rapid Spanning Tree  IEEE 802.1s Multiple Spanning Tree with up to 16 Spanning Tree instances  Supports IEEE 802.1x Access Control Protocol  Port-Based Access Control  MAC-Based Access Control  Guest VLAN  Supports Quality of Service (QoS)  Supports per port Input Bandwidth Control  Traffic classification based on IEEE 802.1p/Q priority definition, physical Port, IP DSCP field, ACL definition, VLAN based priority, MAC based priority, and SVLAN based priority  Eight Priority Queues per port  Per queue flow control  Min-Max Scheduling  Strict Priority and Weighted Fair Queue (WFQ) to provide minimum bandwidth  One leaky bucket to constrain the average packet rate of each queue  Supports rate limiting (64 shared meters, with 8kpbs granulation)  Supports RFC MIB Counter  MIB-II (RFC 1213)  Ethernet-Like MIB (RFC 3635)  Interface Group MIB (RFC 2863)  RMON (RFC 2819)  Bridge MIB (RFC 1493)  Bridge MIB Extension (RFC 2674)  Supports Stacking VLAN and Port Isolation with 8 Enhanced Filtering Databases  Supports IEEE 802.1ad Stacking VLAN  Supports 64 SVLANs  Supports 32 L2/IPv4 Multicast mappings to SVLAN  Supports 4 IEEE 802.3ad Link aggregation port groups  Supports OAM and EEE LLDP (Energy Efficient Ethernet Link Layer Discovery Protocol  Supports Loop Detection  Security Filtering  Disable learning for each port  Disable learning-table aging for each port  Drop unknown DA for each port  Broadcast/Multicast/Unknown DA storm control protects system from attack by hackers  Supports Realtek Green Ethernet features  Link-On Cable Length Power Saving  Link-Down Power Saving  Each port supports 3 parallel LED or scan LED or serial shift LED outputs  Supports I 2 C-like Slave interface or Slave MII Management interface to access configuration register  Supports 16K-byte EEPROM space for configuration  Integrated 8051 microprocessor  Supports SPI Flash Interface  25MHz crystal input  RTL8370N-VB: LQFP 128-pin E-PAD package

SEC_K3RG2G20BM-MGCH000_DRAM_366F 15x15 for All Customers（LPDDR4）.pdf

• Ultra-low-voltage core and I/O power supplies • Frequency range – 933–10 MHz (data rate range: 1866–20 Mb/s/pin) • 8n prefetch DDR architecture • 8 internal banks for concurrent operation • Multiplexed, double data rate, command/address inputs; commands entered on each CK_t/CK_c edge • Bidirectional/differential data strobe per byte of data (DQS_t/DQS_c) • Programmable READ and WRITE latencies (RL/WL) • Burst length: 8 • Per-bank refresh for concurrent operation • Temperature-compensated self refresh (TCSR) • Partial-array self refresh (PASR) • Deep power-down mode (DPD) • Selectable output drive strength (DS) • Clock-stop capability • On-die termination (ODT) • RoHS-compliant, “green” packaging

H26M52208FPR H26M78208CMR H26M64208EMR

• eMMC5.1 compatible (Backward compatible to eMMC4.5&eMMC5;.0) • Bus mode - Data bus width : 1bit(default), 4bits, 8bits - Data transfer rate: up to 400MB/s (HS400) - MMC I/F Clock frequency : 0~200MHz - MMC I/F Boot frequency : 0~52MHz • Operating Voltage Range - Vcc (NAND) : 2.7V - 3.6V - Vccq (Controller) : 1.7V - 1.95V / 2.7V ~ 3.3V • Temperature - Operation (-25℃ ~ +85℃) - Storage without operation (-40℃ ~ +85℃) • Others - This product is compliance with the RoHS directive

KLMxGxJENB-B041(eMMC5.1 1ynm based e_MMC)

 embedded MultiMediaCard Ver. 5.1 compatible.  SAMSUNG eMMC supports features of eMMC5.1 which are defined in JEDEC Standard - Supported Features : Packed command, Cache, Discard, Sanitize, Power Off Notification, Data Tag, Partition types, Context ID, Real Time Clock, Dynamic Device Capacity, Command Queuing, Enhanced Strobe Mode, Secure Write Protection, HS200, HS400, Field Firmware Update. - Non-supported Features : Large Sector Size (4KB)  Full backward compatibility with previous MultiMediaCard system specification (1bit data bus, multi-eMMC systems)  Data bus width : 1bit (Default), 4bit and 8bit  MMC I/F Clock Frequency : 0 ~ 200MHz MMC I/F Boot Frequency : 0 ~ 52MHz  Temperature : Operation (-25C ~ 85C), Storage without operation (-40C ~ 85C)  Power : Interface power → VDD(VCCQ) (1.70V ~ 1.95V or 2.7V ~ 3.6V) , Memory power → VDDF(VCC) (2.7V ~ 3.6V)

KLMxGxxETx-B041(eMMC5.1 e·MMC)

 embedded MultiMediaCard Ver. 5.1 compatible.  SAMSUNG eMMC supports features of eMMC5.1 which are defined in JEDEC Standard - Major Supported Features : HS400, Field Firmware Update, Cache, Command Queuing, Enhanced Strobe Mode,  Secure Write Protection, Partition types. - Non-supported Features : Large Sector Size (4KB)  Backward compatibility with previous MultiMediaCard system specification (1bit data bus, multi-eMMC systems)  Data bus width : 1bit (Default), 4bit and 8bit  MMC I/F Clock Frequency : 0 ~ 200MHz MMC I/F Boot Frequency : 0 ~ 52MHz  Temperature : Operation (-25C ~ 85C), Storage without operation (-40C ~ 85C)  Power : Interface power → VCCQ(1.70V ~ 1.95V) , Memory power → VCC (2.7V ~ 3.6V)

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