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Freescale Semiconductor

Application Note

Document Number: AN535

Rev. 1.0, 02/2006

Abstract

The fundamental design concepts for phase-locked loops

implemented with integrated circuits are outlined. The

necessary equations required to evaluate the basic loop

performance are given in conjunction with a brief design

example.

NOTE

This document contains

references to obsolete part

numbers and is offered for

technical information

only.

1 Introduction

The purpose of this application note is to provide the

electronic system designer with the necessary tools to

design and evaluate Phase-Locked Loops (PLL)

configured with integrated circuits. The majority of all

PLL design problems can be approached using the

Laplace Transform technique. Therefore, a brief review

of Laplace is included to establish a common reference

Phase-Locked Loop Design Fundamentals

by: Garth Nash

Applications Engineering

Contents

1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . 1

2 Parameter Definition . . . . . . . . . . . . . . . . . . 2

3 Type - Order . . . . . . . . . . . . . . . . . . . . . . . . . 3

4 Error Constants . . . . . . . . . . . . . . . . . . . . . . 4

5 Stability . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

6 Bandwidth . . . . . . . . . . . . . . . . . . . . . . . . . . 10

7 Phase-Locked Loop Design Example . . . 11

8 Experimental Results . . . . . . . . . . . . . . . . . 18

9 Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

10 Bibliography . . . . . . . . . . . . . . . . . . . . . . . . 21

Type - Order

Phase-Locked Loop Design Fundamentals Application Note, Rev. 1.0

Freescale Semiconductor 3

The phase detector produces a voltage proportional to the phase difference between the signals θ

and θ

/N.

This voltage upon filtering is used as the control signal for the VCO/VCM (VCM – Voltage Controlled

Multivibrator).

Since the VCO/VCM produces a frequency proportional to its input voltage, any time variant signal

appearing on the control signal will frequency modulate the VCO/VCM. The output frequency is

Eqn. 3

during phase lock. The phase detector, filter, and VCO/VCM compose the feed forward path with the

feedback path containing the programmable divider. Removal of the programmable counter produces

unity gain in the feedback path (N = 1). As a result, the output frequency is then equal to that of the input.

Various types and orders of loops can be constructed depending upon the configuration of the overall loop

transfer function. Identification and examples of these loops are contained in the following two sections.

3 Type - Order

These two terms are used somewhat indiscriminately in published literature, and to date there has not been

an established standard. However, the most common usage will be identified and used in this article.

The type of a system refers to the number of poles of the loop transfer function G(s) H(s) located at the

origin. For example:

Let

Eqn. 4

This is a type one system since there is only one pole at the origin.

The order of a system refers to the highest degree of the polynomial expression

Eqn. 5

which is termed the Characteristic Equation (C.E.). The roots of the characteristic equation become the

closed loop poles of the overall transfer function. For example:

Eqn. 6

Then

Eqn. 7

Therefore

Eqn. 8

Eqn. 9

which is a second order polynomial. Thus, for the given G(s) H(s), we obtain a type 1 second order system.

Nfi=

Gs()Hs()

ss 10+()

----------------------

1Gs()Hs()+0∆C. E. =

Gs()Hs()

ss 10+()

----------------------

1Gs()Hs()+1

ss 10+()

----------------------

+0==

C. E. ss 10+()10+=

C. E. s

10s 10++=

剩余21页未读，继续阅读

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