5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
3.3V
3.3V
3.3V
3.3V
BOOTSEL0 BOOTSEL2 BOOTSEL1 CLKSEL0
CLKSEL1
WARM_RST
HPS_FLASH_DATA2
HPS_FLASH_DATA1
HPS_FLASH_DATA0
HPS_BOOTSEL2
HPS_LED0
HPS_LED1
HPS_LED2
HPS_LED3
HPS_ENET_TX_DATA0
HPS_ENET_TX_DATA1
HPS_ENET_TX_DATA2
HPS_ENET_TX_DATA3
HPS_ENET_RX_DATA0
HPS_ENET_RX_DATA1
HPS_ENET_RX_DATA2
HPS_ENET_RX_DATA3
HPS_SPIM_SS HPS_BOOTSEL2 HPS_FLASH_NCSO HPS_LCM_SPIM_SS HPS_LCM_D_C
HPS_RESET_n
HPS_WARM_RST_n
HPS_RESET_n
HPS_WARM_RST_n
HPS_FLASH_DATA3
GND
VCC3P3
GND
VCC3P3
GND
VCC3P3
GND
VCC3P3
GND
VCC3P3
GND
GND
VCC3P3
GND
VCC3P3
VCC3P3
GND
VCC3P3
VCC3P3
HPS_FLASH_NCSO17
HPS_USB_DATA0 24
HPS_USB_DATA1 24
HPS_USB_DATA2 24
HPS_USB_DATA3 24
HPS_USB_DATA4 24
HPS_SD_DATA223
HPS_USB_DATA524
HPS_USB_DATA624
HPS_USB_STP 24
HPS_USB_DIR 24
HPS_USB_NXT 24
HPS_SD_DATA0 23
HPS_SD_DATA1 23
HPS_USB_CLKOUT24
HPS_USB_DATA724
HPS_CONV_USB_n23
HPS_LCM_RST_n18
HPS_UART_TX23
HPS_UART_RX23
HPS_ENET_RESET_n5,25
HPS_SPIM_CLK26
HPS_SPIM_MOSI26
HPS_SPIM_SS26
HPS_ENET_RX_DATA[3..0] 25
HPS_ENET_TX_DATA[3..0] 25
HPS_I2C_SDA8,26
HPS_I2C_CLK8,26
HPS_GSENSOR_INT26
HPS_ENET_GTX_CLK 25
HPS_ENET_TX_EN 25
HPS_ENET_MDC 25
HPS_ENET_MDIO 25
HPS_ENET_RX_CLK 25
HPS_ENET_RX_DV 25
HPS_ENET_INT_n25
USB3300_MR_n 24
HPS_USB_DATA[7..0] 24
HPS_ENET_RESET_n5,25
HPS_RESET_UART_n23
HPS_WARM_RST_n12
HPS_CLOCK1_256
HPS_LCM_D_C18
HPS_SPIM_MISO26
HPS_TDO 12
HPS_TDI 12
HPS_TMS 12
HPS_TCK 12
USB_RESET_PHY24
HPS_LTC_GPIO26
HPS_LCM_SPIM_CLK18
HPS_LCM_SPIM_MOSI18
HPS_LCM_SPIM_SS18
HPS_SD_CMD 23
HPS_SD_DATA323
HPS_SD_CLK23
HPS_LED[3..0] 22
HPS_CLOCK2_256
HPS_FLASH_DATA[3..0] 17
HPS_FLASH_DCLK17
HPS_LCM_BK17
Title
S
ize Document Number Rev
Date: Sheet of
Copyright (c) 2013 by Terasic Technologies Inc. Taiwan.
No part of this schematic design may be reproduced, duplicated, or used without the prior written permission of Terasic.
All rights reserved.
BANK7 C
SoCKit Board
B
5 31Tuesday, May 14, 2013
Title
Size Document Number Rev
Date: Sheet of
Copyright (c) 2013 by Terasic Technologies Inc. Taiwan.
No part of this schematic design may be reproduced, duplicated, or used without the prior written permission of Terasic.
All rights reserved.
BANK7 C
SoCKit Board
B
5 31Tuesday, May 14, 2013
Title
Size Document Number Rev
Date: Sheet of
Copyright (c) 2013 by Terasic Technologies Inc. Taiwan.
No part of this schematic design may be reproduced, duplicated, or used without the prior written permission of Terasic.
All rights reserved.
BANK7 C
SoCKit Board
B
5 31Tuesday, May 14, 2013
R301 0
J16
CLKSEL1
1
2
3
U29
ADM811
GND
1
RST_n
2
MR_n
3
VCC
4
J19
BOOTSEL1
1
2
3
R299 4.7K
R333 10K
C445 0.1u
J17
BOOTSEL0
1
2
3
R300 100K
R335 10K
R142 0
R337 10K
R298 4.7K
R302 100K
R341 0
R332 0DNI
R133 1K
KEY6
4 3
21
R340 0DNI
TP3
DNI
R330
100K
DNI
J18
BOOTSEL2
1
2
3
KEY5
HPS_RESET_n
4 3
21
J15
CLKSEL0
1
2
3
R138
0
R140 1K
BANK 7
BANK 7A
BANK 7B
BANK 7C
BANK 7D
5CSXFC6DF31
U25G
HPS_NRST
C27
HPS_NPOR
F23
HPS_TDO
B28
HPS_TMS
A29
HPS_TCK
H22
HPS_TRST
A28
HPS_TDI
B27
HPS_PORSEL
F24
HPS_CLK1
D25
HPS_CLK2
F25
NAND_ALE,RGMII1_TX_CLK,QSPI_SS3,HPS_GPIO14
H19
NAND_CE,RGMII1_TXD0,USB1_D0,HPS_GPIO15
F20
NAND_CLE,RGMII1_TXD1,USB1_D1,HPS_GPIO16
J19
NAND_RE,RGMII1_TXD2,USB1_D2,HPS_GPIO17
F21
NAND_RB,RGMII1_TXD3,USB1_D3,HPS_GPIO18
F19
NAND_DQ0,RGMII1_RXD0,HPS_GPIO19
A21
NAND_DQ1,RGMII1_MDIO,I2C3_SDA,HPS_GPIO20
E21
NAND_DQ2,RGMII1_MDC,I2C3_SCL,HPS_GPIO21
B21
NAND_DQ3,RGMII1_RX_CTL,USB1_D4,HPS_GPIO22
K17
NAND_DQ4,RGMII1_TX_CTL,USB1_D5,HPS_GPIO23
A20
NAND_DQ5,RGMII1_RX_CLK,USB1_D6,HPS_GPIO24
G20
NAND_DQ6,RGMII1_RXD1,USB1_D7,HPS_GPIO25
B20
NAND_DQ7,RGMII1_RXD2,HPS_GPIO26
B18
NAND_WP,RGMII1_RXD3,QSPI_SS2,HPS_GPIO27
D21
NAND_WE,QSPI_SS1,BOOTSEL2,HPS_GPIO28
D20
QSPI_IO0,USB1_CLK,HPS_GPIO29
C20
QSPI_IO1,USB1_STP,HPS_GPIO30
H18
QSPI_IO2,USB1_DIR,HPS_GPIO31
A19
QSPI_IO3,USB1_NXT,HPS_GPIO32
E19
QSPI_SS0,BOOTSEL1,HPS_GPIO33
A18
QSPI_CLK,HPS_GPIO34
D19
QSPI_SS1,HPS_GPIO35
C19
SDMMC_CMD,USB0_D0,HPS_GPIO36
F18
SDMMC_PWREN,USB0_D1,HPS_GPIO37
B17
SDMMC_D0,USB0_D2,HPS_GPIO38
G18
SDMMC_D1,USB0_D3,HPS_GPIO39
C17
SDMMC_D4,USB0_D4,HPS_GPIO40
H17
SDMMC_D5,USB0_D5,HPS_GPIO41
C18
SDMMC_D6,USB0_D6,HPS_GPIO42
G17
SDMMC_D7,USB0_D7,HPS_GPIO43
E18
SDMMC_CLK_IN,USB0_CLK,HPS_GPIO44
E17
SDMMC_CLK,USB0_STP,HPS_GPIO45
A16
SDMMC_D2,USB0_DIR,HPS_GPIO46
D17
SDMMC_D3,USB0_NXT,HPS_GPIO47
B16
RGMII0_TX_CLK,HPS_GPIO0
F16
RGMII0_TXD0,USB1_D0,HPS_GPIO1
E16
RGMII0_TXD1,USB1_D1,HPS_GPIO2
G16
RGMII0_TXD2,USB1_D2,HPS_GPIO3
D16
RGMII0_TXD3,USB1_D3,HPS_GPIO4
D14
RGMII0_RXD0,USB1_D4,HPS_GPIO5
A15
RGMII0_MDIO,USB1_D5,I2C2_SDA,HPS_GPIO6
C14
RGMII0_MDC ,USB1_D6,I2C2_SCL,HPS_GPIO7
D15
RGMII0_RX_CTL,USB1_D7,HPS_GPIO8
M17
RGMII0_TX_CTL,HPS_GPIO9
B15
RGMII0_RX_CLK,USB1_CLK,HPS_GPIO10
N16
RGMII0_RXD1,USB1_STP,HPS_GPIO11
C15
RGMII0_RXD2,USB1_DIR,HPS_GPIO12
E14
RGMII0_RXD3,USB1_NXT,HPS_GPIO13
A14
CAN0_TX,UART0_TX,SPIM1_SS0,HPS_GPIO66
D24
CAN0_RX,UART0_RX,SPIM1_MISO,HPS_GPIO65
E24
I2C0_SCL,UART1_TX,SPIM1_MOSI,HPS_GPIO64
D22
I2C0_SDA,UART1_RX,SPIM1_CLK,HPS_GPIO63
C23
UART0_TX,CAN0_TX,SPIM1_SS1,HPS_GPIO62
G22
UART0_RX,CAN0_RX,SPIM0_SS1,HPS_GPIO61
B22
SPIM0_SS0,CAN1_TX,UART1_RTS,BOOTSEL0,HPS_GPIO60
H20
SPIM0_MISO,CAN1_RX,UART1_CTS,HPS_GPIO59
B23
SPIM0_MOSI,I2C1_SCL,UART0_RTS,HPS_GPIO58
C22
SPIM0_CLK,I2C1_SDA,UART0_CTS,HPS_GPIO57
A23
TRACE_D7,SPIS1_MISO,I2C0_SCL,HPS_GPIO56
E23
TRACE_D6,SPIS1_SS0,I2C0_SDA,HPS_GPIO55
C24
TRACE_D5,SPIS1_MOSI,CAN1_TX,HPS_GPIO54
G21
TRACE_D4,SPIS1_CLK,CAN1_RX,HPS_GPIO53
A24
TRACE_D3,SPIS0_SS0,I2C1_SCL,HPS_GPIO52
H23
TRACE_D2,SPIS0_MISO,I2C1_SDA,HPS_GPIO51
A25
TRACE_D1,SPIS0_MOSI,UART0_TX,HPS_GPIO50
C25
TRACE_D0,SPIS0_CLK,UART0_RX,HPS_GPIO49
B25
TRACE_CLK,HPS_GPIO48
B26
R334 10K
R331
100K
DNI
R336 10K
U30
ADM811
GND
1
RST_n
2
MR_n
3
VCC
4
TP5
DNI
R137 0
R136
0
R345 1K
C444 0.1u
R187 1KR139 1K
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