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RT9045
1
RT9045-00P January 2009
www.richtek.com
Pin Configurations
Cost-Effective, 1.8A Sink/Source Bus Termination Regulator
Ordering Information
General Description
The RT9045 is a simple, cost-effective and high-speed
linear regulator designed to generate termination voltage
in double data rate (DDR) memory system to comply with
the devices requirements. The regulator is capable of
actively sinking or sourcing up to 1.8A while regulating an
output voltage to within 20mV. The output termination
voltage can be tightly regulated to track 1/2V
DDQ
by two
external voltage divider resistors or the desired output
voltage can be pro-grammed by externally forcing the
REFEN pin voltage.
The RT9045 also incorporates a high-speed differential
amplifier to provide ultra-fast response in line/load transient.
Other features include extremely low initial offset voltage,
excellent load regulation, current limiting in bi-directions
and on-chip thermal shut-down protection.
Features
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Ideal for DDRII / DDRIII V
TT
Applications
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Sink and Source Current :
1.8A Sink/Source @ V
IN
>>
>>
>
1.5V
1.0A Sink/Source @ V
IN
>>
>>
>
1V
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Integrated Power MOSFETs
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Generate Termination Voltage for DDR Memory
Interfaces
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High Accuracy Output Voltage at Full-Load
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Output Adjustment by Two External Resistors
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Low External Component Count
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Shutdown for Suspend to RAM (STR) Functionality
with High-Impedance Output
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Current Limiting Protection
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On-Chip Thermal Protection
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RoHS Compliant
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Stable with 2.2uF Output Ceramic Capacitor
Applications
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Desktop PCs, Notebooks, and Workstations
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Graphics Card Memory Termination
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Set Top Boxes, Digital TVs, Printers
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Embedded Systems
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Active Termination Buses
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DDR/II/III Memory Systems
(TOP VIEW)
SOP-8 (Exposed Pad)
Note :
Richtek Green products are :
RoHS compliant and compatible with the current require-
ments of IPC/JEDEC J-STD-020.
Suitable for use in SnPb or Pb-free soldering processes.
100%matte tin (Sn) plating.
Package Type
SP : SOP-8 (Exposed Pad)
RT9045
Operating Temperature Range
G : Green (Halogen Free with Commer-
cial Standard)
VIN
GND
REFEN
VOUT
NC
NC
NC
VCNTL
GND
2
3
4
5
6
7
8
9
RT9045
2
RT9045-00P January 2009
www.richtek.com
Typical Application Circuit
R
1
= R
2
= 100kΩ, R
TT
= 50Ω / 33Ω / 25Ω
C
OUT(MIN)
= 10μF (Ceramic) under the worst case testing condition
R
DUMMY
= 1kΩ as for V
OUT
discharge when V
IN
is not presented but V
CNTL
is presented
C
SS
= 1μF, C
IN
= 10μF X 2, C
CNTL
= 1μF
Test Circuit
Figure 1. Output Voltage Tolerance, ΔV
LOAD
Figure 2. Current in Shutdown Mode, I
STBY
VIN
REFEN
GND
VCNTL
VOUT
RT9045
EN
2N7002
R
1
R
2
C
SS
V
IN
= 1.8V/1.5V/1.1V
V
CNTL
= 5V
C
CNTL
C
IN
R
TT
C
OUT
R
DUMMY
VIN
REFEN
GND
VCNTL
VOUT
RT9045
0.9V/0.75V/0.55V
C
OUT
I
L
V
OUT
V
V
IN
= 1.8V/1.5V/1.1V V
CNTL
= 5V
VIN
REFEN
GND
VCNTL
VOUT
RT9045
V
IN
= 1.8V/1.5V/1.1V
0.9V/0.75V/0.55
C
OUT
V
OUT
V
R
L
0.9V
0V
R
L
and C
OUT
Time deleay
0.15V
A
V
CNTL
= 5V
RT9045
3
RT9045-00P January 2009
www.richtek.com
Figure 3. Current Limit for High Side, I
LIM
Figure 4. Current Limit for Low Side, I
LIM
Figure 5. REFEN Pin Shutdown Threshold, V
IH
& V
IL
VIN
REFEN
GND
VCNTL
VOUT
RT9045
0.9V/0.75V/0.55V
C
OUT
I
L
V
OUT
V
A
V
IN
= 1.8V/1.5V/1.1V
V
CNTL
= 5V
VIN
REFEN
GND
VCNTL
VOUT
RT9045
V
IN
= 1.8V/1.5V/1.1V
0.9V/0.75V/0.55V
C
OUT
I
L
V
OUT
V
A
Power Supply
with Current Limit
V
CNTL
= 5V
VIN
REFEN
GND
VCNTL
VOUT
RT9045
V
IN
= 1.8V/1.5V/1.1V
C
OUT
V
OUT
V
R
L
0.9V/0.75V/0.55V
0V
R
L
and C
OUT
Time deleay
0.9V/0.75V/0.55V
0.15V
V
OUT
V
REFEN
V
OUT
would be low if V
REFEN
< 0.15V
V
OUT
would be high if V
REFEN
> 0.4V
V
CNTL
= 5V
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