FlashDisk优盘制作资料资源-CSDN文库

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pdf：3个

txt：2个

hex：2个

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200308171442.rar （11个子文件）

flash_disk_schmatic_v34.opj 1KB

FLASH_DISK_SCHMATIC_V34.DSN 100KB

FLASH_DISK_SCHMATIC_V34.pdf 24KB

声明.html 4KB

codechina.txt 2KB

FlashDiskV17A(WriteProtect).HEX 37KB

eTuni.txt 533B

IC1114-F48LQ Promotion v2.1.pdf 247KB

FlashDiskV17A(No_WriteProtect).HEX 37KB

IC1114 Datasheet V1.pdf 704KB

Ic17-2.job 41KB

IC1114-F48LQ

Integrated Circuit Solution Inc. Version 1.0

1. FEATURES

− High speed 8-bit micro-controller with 4 system clocks

per machine cycle

− Instruction-set compatible with MCS-51

− Embedded 32K-byte program FLASH ROM for

product quick delivery. In System Programming, ISP is

supported by either USB or I2C port.

− Built in fixed address 256 bytes data RAM.

− Built in floating address 4608 bytes data RAM

− Extra 1K bytes CPU data RAM space available by

disable central control block function.

− System power saving mode ready, idle & power down

modes.

− Three programmable 16-bit timer/counter and

watchdog timer.

− Compliant with USB Specification Rev.1.1 supports

full speed (12Mbits/sec), one device address and four

endpoints. (Including control, interrupt, bulk in and

bulk out endpoints)

− Built in ICSI in-house bi-directional parallel port for

quick data transfer. Both master and slave modes are

supported.

− Master/Slave IIC and UART/RS-232 interface for

external device communication.

− Smart Media Card/NAND type flash chip interface

complies with Smart Media Specification Rev.1.1 and

Smart Media Identify Number Specification Version

1.1

− Built-in hardware ECC (Error Correction Code) check

for Smart Media Card/NAND type flash chip.

− 3.0~3.6V supply.

− 48LQFP packages is available.

IC1114-F48LQ

Integrated Circuit Solution Inc. Version 1.0

2. PIN INFORMATION

2.1.1. PIN FUNCTION DESCRIPTION

Function Signal Name IO Pin

Number

Description

Parallel Port PP_D0 IO_TR 10 Parallel port data bus bit 0. Share with PC0

PP_D1 IO_TR 16 Parallel port data bus bit 1. Share with PC1

PP_D2 IO_TR 24 Parallel port data bus bit 2. Share with PC2

PP_D3 IO_TR 25 Parallel port data bus bit 3. Share with PC3

PP_D4 IO_TR 34 Parallel port data bus bit 4. Share with PC4

PP_D5 IO_TR 36 Parallel port data bus bit 5. Share with PC5

PP_D6 IO_TR 44 Parallel port data bus bit 6. Share with PC6

PP_D7 IO_TR 48 Parallel port data bus bit 7. Share with PC7

PP_RW IO_PU 12 Parallel port read/write trigger, active high. Share with P31

PP_RDY IO_PU 22 Parallel port READY signal, active high. Share with P30

PP_EN IO_TR 30 Parallel port enable, active high. Share with P35

IC1114-F48LQ

Integrated Circuit Solution Inc. Version 1.0

Function Signal Name IO Pin

Number

Description

PP_DIR IO_PU 31 Parallel port direction control. Share with P45

SM Card SM_D0 IO_TR 10 SM card data bus bit 0. Share with PC0

SM_D1 IO_TR 16 SM card data bus bit 1. Share with PC1

SM_D2 IO_TR 24 SM card data bus bit 2. Share with PC2

SM_D3 IO_TR 25 SM card data bus bit 3. Share with PC3

SM_D4 IO_TR 34 SM card data bus bit 4. Share with PC4

SM_D5 IO_TR 36 SM card data bus bit 5. Share with PC5

SM_D6 IO_TR 44 SM card data bus bit 6. Share with PC6

SM_D7 IO_TR 48 SM card data bus bit 7. Share with PC7

SM_CD1 IO_PU 8 Card detect pin, active low. Share with P84

SM_CLE IO_PU 31 Command latch enable, active high. Share with P45

SM_RNB IO_PU 19 Ready/Busy. Share with P46

SM_ALE IO_PU 21 Address latch enable, active high. Share with P47

SM_RD IO_TR 11 Read enable, active low. Share with P85

SM_WR IO_TR 26 Write enable, active low. Share with P86

SM_WP IO_TR 29 Write protect, active low. Share with P87

Master/Slave IIC IIC_CL IO_PU 12 IIC clock. Share with P31

IIC_DA IO_PU 22 IIC data. Share with P30

UART TXD IO_PU 12 Serial output. Share with P31

RXD IO_PU 22 Serial input. Share with P30

Timer/counter T1 IO_TR 30 External pin for timer 1. Share with P35

T2 IO_TR 9 External counter clock input for timer 2. Share with P10

T2EX IO_TR 23 External counter enable for timer 2. Share with P11

EXT interrupt INT0 IO_PU 13 External interrupt 0. Share with P32

P10 IO_TR 9 Port 1 bit 0.

P11 IO_TR 23 Port 1 bit 1.

P12 IO_TR 17 Port 1 bit 2.

P13 IO_TR 18 Port 1 bit 3.

P14 IO_TR 20 Port 1 bit 4.

P15 IO_TR 47 Port 1 bit 5.

P16 IO_TR 14 Port 1 bit 6.

P17 IO_TR 15 Port 1 bit 7.

P30 IO_PU 22 Port 3 bit 0.

P31 IO_PU 12 Port 3 bit 1.

P32 IO_PU 13 Port 3 bit 2.

P35 IO_PU 30 Port 3 bit 5.

P36 IO_PU 35 Port 3 bit 6.

P37 IO_PU 28 Port 3 bit 7.

P45 IO_PU 31 Port 4 bit 5.

P46 IO_PU 19 Port 4 bit 6.

P47 IO_PU 21 Port 4 bit 7.

P84 IO_PU 8 Port 8 bit 4.

P85 IO_TR 11 Port 8 bit 5.

P86 IO_TR 26 Port 8 bit 6.

P87 IO_TR 29 Port 8 bit 7.

PC0 IO_TR 9 Port C bit 0.

PC1 IO_TR 23 Port C bit 1.

IC1114-F48LQ

Integrated Circuit Solution Inc. Version 1.0

Function Signal Name IO Pin

Number

Description

PC2 IO_TR 17 Port C bit 2.

PC3 IO_TR 18 Port C bit 3.

PC4 IO_TR 20 Port C bit 4.

PC5 IO_TR 47 Port C bit 5.

PC6 IO_TR 14 Port C bit 6.

PC7 IO_TR 15 Port C bit 7.

PLL FILTER O 41 External loop filter pin, a capacitor is connected between this

pin and analog ground

USB DPLUS IO 37 USB DPLUS pin

DMINUS IO 38 USB DMINUS pin

XTAL XTAL1 I 45 XTAL oscillator input pin

XTAL2 O 46 XTAL oscillator output pin

Power AVDD P 39/43 Analog 3.3V

AVSS P 40/42 Analog ground

Power VSS P 2/5/33 Digital ground pin

VDD P 1/4/27/32 Digital 3.3V

RST I 3 System reset pin, Shmmit trigger

SELCLK SEL1 I 6 CPU clock select pin 1

SEL2 I 7 CPU clock select pin 2

Note :

− After reset, all extra function is disabling. When extra function enable, that I/O is in input or output mode is

dependent on pin function.

− Ports are GPIO and input after reset, and still a GPIO if the extra function does not turn on by software. The initial

state of GPIO is High, LOW, or TRI-STATE, which is dependent on I/O cell as IO_PU, IO_PD or IO_TR.

− SEL [2:1]=00, 01, or 10 CPU clock is 12Mhz, 24Mhz or 48Mhz. SEL [2:1]=11 is reserved.

− Connect 1.2 Mohm between XTAL1 and XTAL2.

− Connect 820 pF between FILTER and VSS.

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