• UART example design

    UART controller example design for your own design reference for FPGA/CPLD. This design very simple and easy for read.

    0
    62
    9KB
    2020-12-11
    9
  • usb_host.7z

    USB Host example design for FPGA/CPLD and you can refer this source for your design.

    0
    54
    90B
    2020-12-11
    9
  • NiosII_Dual_Core_restored.7z

    Nios CPU Dual Core example deisgn for Altera FPGA/CPLD , you can refer for CPU design.

    0
    68
    7.75MB
    2020-12-11
    9
  • xge_mac-master.zip

    XGE MAC example deisgn for FPGA/CPLD, you can refer this source to design your own design.

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    140
    791KB
    2020-12-11
    14
  • dsi_controller-master.zip

    DSI controller example design for FPGA/CPLD, you can refer for DSI interface design.

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    127
    2.29MB
    2020-12-11
    10
  • SI5338-VHDL-master.zip

    S5338 config source code based on VHDL for FPGA implement.

    0
    190
    312KB
    2020-12-11
    14
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