• C51活泼流水灯(C语言)

    C51活泼流水灯(C语言) 实验要求] 单片机P1口相连的8个发光二极管中的一个循环移位点亮,同时蜂鸣器发出滴滴的响声。 蜂鸣器用一PNP三极管驱动,集电极(C极)通过蜂鸣器线圈接5V电源,基极(B极)是控制端,发射极(E极)接地,当三极管C,B极PN结正偏时,PN结导通,即B极为低电平时,三极管导通,蜂鸣器响。再不明白去看模电书。 [实验目的] 掌握循环移位的工作原理,学会使用封装好的函数库, 延时函数的时间估算。

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  • 51单片机PWM调温,C语言

    #include <reg52.h> //#include <at89x52.h> //#include <keyscan.h> extern void scan_full(void); extern unsigned char key_scan(void); extern bit key_ok; unsigned char pwm_set,key_value; unsigned char count; sbit PWM=P3^6; bit up,down,set_flag; ...

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  • 51单片机的音乐采灯程序.C.txt

    #include <reg51.h> sbit speaker=P3^0; unsigned char timer0h,timer0l,time,led=1,j=0; unsigned char flagd=0; //世上只有妈妈好数据表 ....

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  • 1602液晶显示C程序.txt

    此程序实现,完成液晶的驱动程序,可以显示任意的ASCII字符

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    2009-12-18
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  • 18b20--c程序

    18b20 c程序 单片机 控制蜂鸣器

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    2009-12-17
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  • OPA2357AIDGST.pdf

    The OPA357 series of high-speed, voltage-feedback CMOS operational amplifiers are designed for video and other applications requiring wide bandwidth. They are unity-gain stable and can drive large output currents. Differential gain is 0.02% and differential phase is 0.09°. Quiescent current is only 4.9mA per channel.

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  • K9F5608U0D-PCB0.pdf

    Offered in 32Mx8bit , the K9F5608X0D is 256M bit with spare 8M bit capacity. The device is offered in 1.8V, 2.65V, 3.3V Vcc. Its NAND cell provides the most cost-effective solutIon for the solid state mass storage market. A program operation can be performed in typical 200µs on a 528-byte page and an erase operation can be performed in typical 2ms on a 16K-byte block. Data in the page can be read out at 50ns cycle time per byte. The I/O pins serve as the ports for address and data input/output as well as command input. The on-chip write control automates all program and erase functions including pulse repetition, where required, and internal verification and margining of data. Even the write-intensive systems can take advantage of the K9F5608X0D′s extended reliability of 100K program/erase cycles by providing ECC(Error Correcting Code) with real time mapping-out algorithm.

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  • K4T1G164QE-HEC6.pdf

    The 1Gb DDR2 SDRAM is organized as a 32Mbit x 4 I/Os x 8 banks, 16Mbit x 8 I/Os x 8banks or 8Mbit x 16 I/Os x 8 banks device. This synchronous device achieves high speed double- data-rate transfer rates of up to 667Mb/sec/pin (DDR2-667) for general applications.

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  • IP Camera Reference Designs.pdf

    Texas Instruments offers multiple highly optimized reference designs based on the TMS320DM3x DaVinci™ video processors for the IP camera market to enable developers to speed through the design process as well as reducing overall bill of materials costs. These reference designs:

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  • DM9161.pdf

    The DM9161B is a physical layer, single-chip, and low power transceiver for 100BASE-TX and 10BASE-T operations. On the media side, it provides a direct interface either to Unshielded Twisted Pair Category 5 Cable (UTP5) for 100BASE-TX Fast Ethernet, or UTP5/UTP3 Cable for 10BASE-T Ethernet. Through the Media Independent Interface (MII), the DM9161B connects to the Medium Access Control (MAC) layer, ensuring a high inter operability from different vendors.

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    2009-12-17
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