/*!
\file gd32f3x0_timer.c
\brief TIMER driver
\version 2017-06-06, V1.0.0, firmware for GD32F3x0
\version 2019-06-01, V2.0.0, firmware for GD32F3x0
\version 2020-09-30, V2.1.0, firmware for GD32F3x0
\version 2022-01-06, V2.2.0, firmware for GD32F3x0
*/
/*
Copyright (c) 2022, GigaDevice Semiconductor Inc.
Redistribution and use in source and binary forms, with or without modification,
are permitted provided that the following conditions are met:
1. Redistributions of source code must retain the above copyright notice, this
list of conditions and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright notice,
this list of conditions and the following disclaimer in the documentation
and/or other materials provided with the distribution.
3. Neither the name of the copyright holder nor the names of its contributors
may be used to endorse or promote products derived from this software without
specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
OF SUCH DAMAGE.
*/
#include "gd32f3x0_timer.h"
/*!
\brief deinit a TIMER
\param[in] timer_periph: TIMERx(x=0..2,13..16),TIMER5 just for GD32F350
\param[out] none
\retval none
*/
void timer_deinit(uint32_t timer_periph)
{
switch(timer_periph) {
case TIMER0:
/* reset TIMER0 */
rcu_periph_reset_enable(RCU_TIMER0RST);
rcu_periph_reset_disable(RCU_TIMER0RST);
break;
case TIMER1:
/* reset TIMER1 */
rcu_periph_reset_enable(RCU_TIMER1RST);
rcu_periph_reset_disable(RCU_TIMER1RST);
break;
case TIMER2:
/* reset TIMER2 */
rcu_periph_reset_enable(RCU_TIMER2RST);
rcu_periph_reset_disable(RCU_TIMER2RST);
break;
#ifdef GD32F350
case TIMER5:
/* reset TIMER5 */
rcu_periph_reset_enable(RCU_TIMER5RST);
rcu_periph_reset_disable(RCU_TIMER5RST);
break;
#endif
case TIMER13:
/* reset TIMER13 */
rcu_periph_reset_enable(RCU_TIMER13RST);
rcu_periph_reset_disable(RCU_TIMER13RST);
break;
case TIMER14:
/* reset TIMER14 */
rcu_periph_reset_enable(RCU_TIMER14RST);
rcu_periph_reset_disable(RCU_TIMER14RST);
break;
case TIMER15:
/* reset TIMER15 */
rcu_periph_reset_enable(RCU_TIMER15RST);
rcu_periph_reset_disable(RCU_TIMER15RST);
break;
case TIMER16:
/* reset TIMER16 */
rcu_periph_reset_enable(RCU_TIMER16RST);
rcu_periph_reset_disable(RCU_TIMER16RST);
break;
default:
break;
}
}
/*!
\brief initialize TIMER init parameter struct with a default value
\param[in] initpara: init parameter struct
\param[out] none
\retval none
*/
void timer_struct_para_init(timer_parameter_struct *initpara)
{
/* initialize the init parameter struct member with the default value */
initpara->prescaler = 0U;
initpara->alignedmode = TIMER_COUNTER_EDGE;
initpara->counterdirection = TIMER_COUNTER_UP;
initpara->period = 65535U;
initpara->clockdivision = TIMER_CKDIV_DIV1;
initpara->repetitioncounter = 0U;
}
/*!
\brief initialize TIMER counter
\param[in] timer_periph: TIMERx(x=0..2,13..16),TIMER5 just for GD32F350
\param[in] timer_initpara: init parameter struct
prescaler: prescaler value of the counter clock,0~65535
alignedmode: TIMER_COUNTER_EDGE,TIMER_COUNTER_CENTER_DOWN,TIMER_COUNTER_CENTER_UP,TIMER_COUNTER_CENTER_BOTH
counterdirection: TIMER_COUNTER_UP,TIMER_COUNTER_DOWN
period: counter auto reload value,(TIMER1 32 bit)
clockdivision: TIMER_CKDIV_DIV1,TIMER_CKDIV_DIV2,TIMER_CKDIV_DIV4
repetitioncounter: counter repetition value,0~255
\param[out] none
\retval none
*/
void timer_init(uint32_t timer_periph, timer_parameter_struct *initpara)
{
/* configure the counter prescaler value */
TIMER_PSC(timer_periph) = (uint16_t)initpara->prescaler;
/* configure the counter direction and aligned mode */
if((TIMER0 == timer_periph) || (TIMER1 == timer_periph) || (TIMER2 == timer_periph)) {
TIMER_CTL0(timer_periph) &= ~(uint32_t)(TIMER_CTL0_DIR | TIMER_CTL0_CAM);
TIMER_CTL0(timer_periph) |= (uint32_t)initpara->alignedmode;
TIMER_CTL0(timer_periph) |= (uint32_t)initpara->counterdirection;
}
/* configure the autoreload value */
TIMER_CAR(timer_periph) = (uint32_t)initpara->period;
if((TIMER0 == timer_periph) || (TIMER1 == timer_periph) || (TIMER2 == timer_periph) || (TIMER13 == timer_periph)
|| (TIMER14 == timer_periph) || (TIMER15 == timer_periph) || (TIMER16 == timer_periph)) {
/* reset the CKDIV bit */
TIMER_CTL0(timer_periph) &= ~(uint32_t)TIMER_CTL0_CKDIV;
TIMER_CTL0(timer_periph) |= (uint32_t)initpara->clockdivision;
}
if((TIMER0 == timer_periph) || (TIMER14 == timer_periph) || (TIMER15 == timer_periph) || (TIMER16 == timer_periph)) {
/* configure the repetition counter value */
TIMER_CREP(timer_periph) = (uint32_t)initpara->repetitioncounter;
}
/* generate an update event */
TIMER_SWEVG(timer_periph) |= (uint32_t)TIMER_SWEVG_UPG;
}
/*!
\brief enable a TIMER
\param[in] timer_periph: TIMERx(x=0..2,13..16),TIMER5 just for GD32F350
\param[out] none
\retval none
*/
void timer_enable(uint32_t timer_periph)
{
TIMER_CTL0(timer_periph) |= (uint32_t)TIMER_CTL0_CEN;
}
/*!
\brief disable a TIMER
\param[in] timer_periph: TIMERx(x=0..2,13..16),TIMER5 just for GD32F350
\param[out] none
\retval none
*/
void timer_disable(uint32_t timer_periph)
{
TIMER_CTL0(timer_periph) &= ~(uint32_t)TIMER_CTL0_CEN;
}
/*!
\brief enable the auto reload shadow function
\param[in] timer_periph: TIMERx(x=0..2,13..16),TIMER5 just for GD32F350
\param[out] none
\retval none
*/
void timer_auto_reload_shadow_enable(uint32_t timer_periph)
{
TIMER_CTL0(timer_periph) |= (uint32_t)TIMER_CTL0_ARSE;
}
/*!
\brief disable the auto reload shadow function
\param[in] timer_periph: TIMERx(x=0..2,13..16),TIMER5 just for GD32F350
\param[out] none
\retval none
*/
void timer_auto_reload_shadow_disable(uint32_t timer_periph)
{
TIMER_CTL0(timer_periph) &= ~(uint32_t)TIMER_CTL0_ARSE;
}
/*!
\brief enable the update event
\param[in] timer_periph: TIMERx(x=0..2,13..16),TIMER5 just for GD32F350
\param[out] none
\retval none
*/
void timer_update_event_enable(uint32_t timer_periph)
{
TIMER_CTL0(timer_periph) &= ~(uint32_t)TIMER_CTL0_UPDIS;
}
/*!
\brief disable the update event
\param[in] timer_periph: TIMERx(x=0..2,13..16),TIMER5 just for GD32F350
\param[out] none
\retval none
*/
void timer_update_event_disable(uint32_t timer_periph)
{
TIMER_CTL
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SysTick定时器延时函数
共159个文件
h:34个
o:29个
d:29个
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2022-07-02
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使用GD32的SysTick定时器来设计延时函数
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SysTick定时器延时函数 (159个子文件)
GD32F3x0.axf 77KB
gd32f3x0_timer.c 88KB
gd32f3x0_usart.c 44KB
gd32f3x0_rcu.c 43KB
gd32f3x0_rtc.c 36KB
gd32f3x0_adc.c 30KB
system_gd32f3x0.c 28KB
gd32f3x0_i2c.c 26KB
gd32f3x0_fmc.c 25KB
gd32f3x0_spi.c 25KB
gd32f3x0_tsi.c 24KB
gd32f3x0_dma.c 21KB
gd32f3x0_cec.c 18KB
gd32f3x0_gpio.c 15KB
gd32f3x0_pmu.c 13KB
gd32f3x0_ctc.c 12KB
gd32f3x0_dac.c 11KB
gd32f3x0_exti.c 9KB
gd32f3x0_syscfg.c 8KB
gd32f3x0_cmp.c 8KB
gd32f3x0_crc.c 8KB
gd32f3x0_misc.c 7KB
gd32f3x0_fwdgt.c 6KB
gd32f3x0_dbg.c 6KB
gd32f3x0_wwdgt.c 4KB
gd32f3x0_it.c 4KB
delay.c 882B
bsp_led.c 321B
main.c 269B
gd32f3x0_timer.crf 233KB
gd32f3x0_rcu.crf 224KB
gd32f3x0_usart.crf 223KB
gd32f3x0_rtc.crf 223KB
gd32f3x0_adc.crf 220KB
gd32f3x0_fmc.crf 220KB
gd32f3x0_cmp.crf 218KB
gd32f3x0_i2c.crf 217KB
gd32f3x0_tsi.crf 217KB
gd32f3x0_dma.crf 217KB
system_gd32f3x0.crf 216KB
gd32f3x0_spi.crf 216KB
gd32f3x0_pmu.crf 214KB
gd32f3x0_gpio.crf 214KB
gd32f3x0_ctc.crf 214KB
gd32f3x0_crc.crf 213KB
gd32f3x0_exti.crf 213KB
gd32f3x0_syscfg.crf 213KB
gd32f3x0_fwdgt.crf 212KB
gd32f3x0_misc.crf 212KB
delay.crf 212KB
gd32f3x0_wwdgt.crf 212KB
bsp_led.crf 212KB
gd32f3x0_dbg.crf 212KB
main.crf 211KB
gd32f3x0_it.crf 211KB
gd32f3x0_dac.crf 93B
gd32f3x0_cec.crf 93B
gd32f3x0_syscfg.d 2KB
gd32f3x0_wwdgt.d 2KB
gd32f3x0_fwdgt.d 2KB
gd32f3x0_timer.d 2KB
gd32f3x0_usart.d 2KB
gd32f3x0_gpio.d 2KB
gd32f3x0_misc.d 2KB
gd32f3x0_exti.d 2KB
system_gd32f3x0.d 2KB
gd32f3x0_cmp.d 2KB
gd32f3x0_dma.d 2KB
gd32f3x0_tsi.d 2KB
gd32f3x0_spi.d 2KB
gd32f3x0_i2c.d 2KB
gd32f3x0_rcu.d 2KB
gd32f3x0_dbg.d 2KB
gd32f3x0_pmu.d 2KB
gd32f3x0_adc.d 2KB
gd32f3x0_fmc.d 2KB
gd32f3x0_crc.d 2KB
gd32f3x0_ctc.d 2KB
gd32f3x0_rtc.d 2KB
gd32f3x0_it.d 2KB
bsp_led.d 2KB
main.d 2KB
delay.d 1KB
gd32f3x0_cec.d 58B
startup_gd32f3x0.d 58B
gd32f3x0_dac.d 58B
GD32F3x0_GD32F330.dep 47KB
core_cm4.h 107KB
gd32f3x0_timer.h 66KB
gd32f3x0_rcu.h 56KB
gd32f3x0_rtc.h 46KB
gd32f3x0_usart.h 39KB
gd32f3x0_gpio.h 28KB
gd32f3x0_tsi.h 27KB
gd32f3x0_adc.h 26KB
gd32f3x0_spi.h 24KB
gd32f3x0_i2c.h 23KB
core_cm4_simd.h 22KB
gd32f3x0_exti.h 21KB
gd32f3x0_dma.h 19KB
共 159 条
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