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VS1053b Datasheet

VS1053b -

Ogg Vorbis/MP3/AAC/WMA/FLAC/

MIDI AUDIO CODEC CIRCUIT

Features

• Decodes

Ogg Vorbis;

MP3 = MPEG 1 & 2 audio layer III (CBR

+VBR +ABR);

MP1/MP2 = layers I & II optional;

MPEG4 / 2 AAC-LC(+PNS),

HE-AAC v2 (Level 3) (SBR + PS);

WMA 4.0/4.1/7/8/9 all proﬁles (5-384 kbps);

General MIDI 1 / SP-MIDI format 0 ﬁles;

FLAC with software plugin;

WAV (PCM + IMA ADPCM)

• Encodes Ogg Vorbis w/ software plugin

• Encodes stereo IMA ADPCM / PCM

• Streaming support for MP3 and WAV

• EarSpeaker Spatial Processing

• Bass and treble controls

• Operates with a single 12..13 MHz clock

• Can also be used with a 24..26 MHz clock

• Internal PLL clock multiplier

• Low-power operation

• High-quality on-chip stereo DAC with no

phase error between channels

• Zero-cross detection for smooth volume

change

• Stereo earphone driver capable of driv-

ing a 30 Ω load

• Quiet power-on and power-off

• I2S interface for external DAC

• Separate voltages for analog, digital, I/O

• On-chip RAM for user code and data

• Serial control and data interfaces

• Can be used as a slave co-processor

• SPI ﬂash boot for special applications

• UART for debugging purposes

• New functions may be added with soft-

ware and upto 8 GPIO pins

• Lead-free RoHS-compliant package (Green)

Description

VS1053b is an Ogg Vorbis/MP3/AAC/WMA/

FLAC/WAVMIDI audio decoder as well as an

PCM/IMA ADPCM/Ogg Vorbis encoder on a

single chip. It contains a high-performance,

proprietary low-power DSP processor core

VS_DSP

, data memory, 16 KiB instruction

RAM and 0.5+ KiB data RAM for user appli-

cations running simultaneously with any built-

in decoder, serial control and input data in-

terfaces, upto 8 general purpose I/O pins, an

UART, as well as a high-quality variable-sample-

rate stereo ADC (mic, line, line + mic or 2×line)

and stereo DAC, followed by an earphone am-

pliﬁer and a common voltage buffer.

VS1053b receives its input bitstream through

a serial input bus, which it listens to as a

system slave. The input stream is decoded

and passed through a digital volume control

to an 18-bit oversampling, multi-bit, sigma-

delta DAC. The decoding is controlled via a

serial control bus. In addition to the basic de-

coding, it is possible to add application spe-

ciﬁc features, like DSP effects, to the user

RAM memory.

Optional factory-programmable unique chip

ID provides basis for digital rights manage-

ment or unit identiﬁcation features.

Version: 1.13, 2011-05-27 1

VS1053b Datasheet

CONTENTS

Contents

VS1053 1

Table of Contents 2

List of Figures 5

1 Licenses 6

2 Disclaimer 6

3 Deﬁnitions 6

4 Characteristics & Speciﬁcations 7

4.1 Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

4.2 Recommended Operating Conditions . . . . . . . . . . . . . . . . . . . . . . . . 7

4.3 Analog Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

4.4 Power Consumption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

4.5 Digital Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

4.6 Switching Characteristics - Boot Initialization . . . . . . . . . . . . . . . . . . . . 9

5 Packages and Pin Descriptions 10

5.1 Packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

5.1.1 LQFP-48 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

6 Connection Diagram, LQFP-48 13

7 SPI Buses 15

7.1 General . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

7.2 SPI Bus Pin Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

7.2.1 VS1002 Native Modes (New Mode) . . . . . . . . . . . . . . . . . . . 15

7.2.2 VS1001 Compatibility Mode (deprecated) . . . . . . . . . . . . . . . 15

7.3 Data Request Pin DREQ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

7.4 Serial Protocol for Serial Data Interface (SDI) . . . . . . . . . . . . . . . . . . . 16

7.4.1 General . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

7.4.2 SDI in VS1002 Native Modes (New Mode) . . . . . . . . . . . . . . . 17

7.4.3 SDI in VS1001 Compatibility Mode (deprecated) . . . . . . . . . . . . 18

7.4.4 Passive SDI Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

7.5 Serial Protocol for Serial Command Interface (SCI) . . . . . . . . . . . . . . . . 18

7.5.1 General . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

7.5.2 SCI Read . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

7.5.3 SCI Write . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

7.5.4 SCI Multiple Write . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

7.6 SPI Timing Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

7.7 SPI Examples with SM_SDINEW and SM_SDISHARED set . . . . . . . . . . . 22

7.7.1 Two SCI Writes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

7.7.2 Two SDI Bytes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

7.7.3 SCI Operation in Middle of Two SDI Bytes . . . . . . . . . . . . . . . 23

8 Functional Description 24

8.1 Main Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

Version: 1.13, 2011-05-27 2

VS1053b Datasheet

CONTENTS

8.2 Supported Audio Codecs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

8.2.1 Supported MP3 (MPEG layer III) Formats . . . . . . . . . . . . . . . 24

8.2.2 Supported MP1 (MPEG layer I) Formats . . . . . . . . . . . . . . . . 25

8.2.3 Supported MP2 (MPEG layer II) Formats . . . . . . . . . . . . . . . . 25

8.2.4 Supported Ogg Vorbis Formats . . . . . . . . . . . . . . . . . . . . . 25

8.2.5 Supported AAC (ISO/IEC 13818-7 and ISO/IEC 14496-3) Formats . 26

8.2.6 Supported WMA Formats . . . . . . . . . . . . . . . . . . . . . . . . 28

8.2.7 Supported FLAC Formats . . . . . . . . . . . . . . . . . . . . . . . . 29

8.2.8 Supported RIFF WAV Formats . . . . . . . . . . . . . . . . . . . . . . 29

8.2.9 Supported MIDI Formats . . . . . . . . . . . . . . . . . . . . . . . . . 30

8.3 Data Flow of VS1053b . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

8.4 EarSpeaker Spatial Processing . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

8.5 Serial Data Interface (SDI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

8.6 Serial Control Interface (SCI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

8.7 SCI Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

8.7.1 SCI_MODE (RW) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

8.7.2 SCI_STATUS (RW) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38

8.7.3 SCI_BASS (RW) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39

8.7.4 SCI_CLOCKF (RW) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40

8.7.5 SCI_DECODE_TIME (RW) . . . . . . . . . . . . . . . . . . . . . . . 41

8.7.6 SCI_AUDATA (RW) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41

8.7.7 SCI_WRAM (RW) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41

8.7.8 SCI_WRAMADDR (W) . . . . . . . . . . . . . . . . . . . . . . . . . . 42

8.7.9 SCI_HDAT0 and SCI_HDAT1 (R) . . . . . . . . . . . . . . . . . . . . 42

8.7.10 SCI_AIADDR (RW) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44

8.7.11 SCI_VOL (RW) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45

8.7.12 SCI_AICTRL[x] (RW) . . . . . . . . . . . . . . . . . . . . . . . . . . . 45

9 Operation 46

9.1 Clocking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46

9.2 Hardware Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46

9.3 Software Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46

9.4 Low Power Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47

9.5 Play and Decode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47

9.5.1 Playing a Whole File . . . . . . . . . . . . . . . . . . . . . . . . . . . 48

9.5.2 Cancelling Playback . . . . . . . . . . . . . . . . . . . . . . . . . . . 48

9.5.3 Fast Play . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48

9.5.4 Fast Forward and Rewind without Audio . . . . . . . . . . . . . . . . 49

9.5.5 Maintaining Correct Decode Time . . . . . . . . . . . . . . . . . . . . 49

9.6 Feeding PCM data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50

9.7 Ogg Vorbis Recording . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50

9.8 PCM/ADPCM Recording . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51

9.8.1 Activating ADPCM Mode . . . . . . . . . . . . . . . . . . . . . . . . . 51

9.8.2 Reading PCM / IMA ADPCM Data . . . . . . . . . . . . . . . . . . . . 52

9.8.3 Adding a PCM RIFF Header . . . . . . . . . . . . . . . . . . . . . . . 53

9.8.4 Adding an IMA ADPCM RIFF Header . . . . . . . . . . . . . . . . . . 54

9.8.5 Playing ADPCM Data . . . . . . . . . . . . . . . . . . . . . . . . . . . 55

9.8.6 Sample Rate Considerations . . . . . . . . . . . . . . . . . . . . . . . 55

9.8.7 Record Monitoring Volume . . . . . . . . . . . . . . . . . . . . . . . . 55

9.9 SPI Boot . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57

Version: 1.13, 2011-05-27 3

VS1053b Datasheet

CONTENTS

9.10 Real-Time MIDI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57

9.11 Extra Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58

9.11.1 Common Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . 59

9.11.2 WMA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60

9.11.3 AAC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61

9.11.4 Midi . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62

9.11.5 Ogg Vorbis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62

9.12 SDI Tests . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63

9.12.1 Sine Test . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63

9.12.2 Pin Test . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64

9.12.3 SCI Test . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64

9.12.4 Memory Test . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64

9.12.5 New Sine and Sweep Tests . . . . . . . . . . . . . . . . . . . . . . . 64

10 VS1053b Registers 66

10.1 Who Needs to Read This Chapter . . . . . . . . . . . . . . . . . . . . . . . . . . 66

10.2 The Processor Core . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66

10.3 VS1053b Memory Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66

10.4 SCI Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66

10.5 Serial Data Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67

10.6 DAC Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67

10.7 GPIO Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68

10.8 Interrupt Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69

10.9 Watchdog v1.0 2002-08-26 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70

10.9.1 Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70

10.10 UART v1.1 2004-10-09 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71

10.10.1 Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71

10.10.2 Status UARTx_STATUS . . . . . . . . . . . . . . . . . . . . . . . . . 71

10.10.3 Data UARTx_DATA . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72

10.10.4 Data High UARTx_DATAH . . . . . . . . . . . . . . . . . . . . . . . . 72

10.10.5 Divider UARTx_DIV . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72

10.10.6 Interrupts and Operation . . . . . . . . . . . . . . . . . . . . . . . . . 73

10.11 Timers v1.0 2002-04-23 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74

10.11.1 Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74

10.11.2 Conﬁguration TIMER_CONFIG . . . . . . . . . . . . . . . . . . . . . 74

10.11.3 Conﬁguration TIMER_ENABLE . . . . . . . . . . . . . . . . . . . . . 75

10.11.4 Timer X Startvalue TIMER_Tx[L/H] . . . . . . . . . . . . . . . . . . . 75

10.11.5 Timer X Counter TIMER_TxCNT[L/H] . . . . . . . . . . . . . . . . . . 75

10.11.6 Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75

10.12 VS1053b Audio Path . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76

10.13 I2S DAC Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77

10.13.1 Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77

10.13.2 Conﬁguration I2S_CONFIG . . . . . . . . . . . . . . . . . . . . . . . 77

11 Version Changes 79

11.1 Changes Between VS1033c and VS1053a/b Firmware, 2007-03-08 . . . . . . . 79

12 Document Version Changes 81

13 Contact Information 82

Version: 1.13, 2011-05-27 4

剩余81页未读，继续阅读

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