TMS320F28335, TMS320F28334, TMS320F28332
TMS320F28235, TMS320F28234, TMS320F28232
www.ti.com.cn
ZHCS889M –JUNE 2007–REVISED AUGUST 2012
内内容容
1 TMS320F2833x,,TMS320F2823x DSC .................................................................................. 10
1.1 特性 ......................................................................................................................... 10
1.2 开始使用 .................................................................................................................... 11
2 简简介介 .................................................................................................................................. 12
2.1 引脚分配 .................................................................................................................... 14
2.2 信号说明 .................................................................................................................... 23
3 功功能能概概述述 ............................................................................................................................ 33
3.1 内存映射 .................................................................................................................... 34
3.2 简要说明 .................................................................................................................... 41
3.2.1 C28x CPU ....................................................................................................... 41
3.2.2 内存总线(哈弗总线架构) .................................................................................... 41
3.2.3 外设总线 ......................................................................................................... 41
3.2.4 实时 JTAG 和分析 .............................................................................................. 42
3.2.5 外部接口(XINTF) ................................................................................................ 42
3.2.6 闪存 ............................................................................................................... 42
3.2.7 M0,M1 SARAM ............................................................................................... 42
3.2.8 L0, L1, L2, L3, L4, L5, L6, L7SARAM ........................................................................ 43
3.2.9 引导 ROM ........................................................................................................ 43
3.2.9.1 引导加载器使用的外设引脚 ....................................................................... 44
3.2.10 安全性 ............................................................................................................ 44
3.2.11 外设中断扩展 (PIE) 块 ......................................................................................... 46
3.2.12 外部中断 (XINT1-XINT7,XNMI) ............................................................................. 46
3.2.13 振荡器和锁相环 (PLL) .......................................................................................... 46
3.2.14 安全装置 ......................................................................................................... 46
3.2.15 外设时钟 ......................................................................................................... 46
3.2.16 低功率模式 ....................................................................................................... 46
3.2.17 外设帧 0,1,2,3 (PFn) ...................................................................................... 47
3.2.18 通用输入/输出 (GPIO) 复用器 ................................................................................. 47
3.2.19 32 位 CPU 定时器 (0,1,2) .................................................................................. 47
3.2.20 控制外设 ......................................................................................................... 48
3.2.21 串行端口外设 .................................................................................................... 48
3.3 寄存器映射 ................................................................................................................. 49
3.4 器件仿真寄存器 ............................................................................................................ 51
3.5 中断 .......................................................................................................................... 52
3.5.1 外部中断 ......................................................................................................... 56
3.6 系统控制 .................................................................................................................... 57
3.6.1 OSC 和 PLL 块 .................................................................................................. 58
3.6.1.1 外部基准振荡器时钟选项 .......................................................................... 59
3.6.1.2 基于 PLL 的时钟模块 .............................................................................. 60
3.6.1.3 输入时钟损失 ....................................................................................... 61
3.6.2 安全装置块 ....................................................................................................... 62
3.7 低功率模式块 ............................................................................................................... 63
4 外外设设 .................................................................................................................................. 64
4.1 DMA 概述 ................................................................................................................... 64
4.2 32 位 CPU 定时器 0,CPU 定时器 1,CPU 定时器 2 ............................................................... 66
4.3 增强型 PWM 模块 ......................................................................................................... 68
4.4 高分辨率 PWM (HRPWM) ................................................................................................ 72
4.5 增强型 CAP 模块 .......................................................................................................... 73
4.6 增强型 QEP 模块 .......................................................................................................... 75
4.7 模数转换器 (ADC) 模块 ................................................................................................... 77
4.7.1 如果 ADC 未被使用,ADC 连接 .............................................................................. 81
2
内容
版权 © 2007–2012, Texas Instruments Incorporated
- 1
- 2
- 3
- 4
- 5
前往页