/*####################################################################################*//**
*# @file: logo.c
*# @Author: zanget
*# @time: 2011-07-14 / 16:21
*####################################################################################*/
// Standard I/O
#include <stdio.h>
// General type include
#include "tistdtypes.h"
// This module's header file
#include "debug.h"
/* General type include */
#include "tistdtypes.h"
/* This module's header file */
#include "device.h"
/* Debug module */
#include "debug.h"
/* Utility functions */
#include "util.h"
// Main UBL module
#include "ubl.h"
// NAND driver functions
#include "nand.h"
// Device specific NAND info
#include "device_nand.h"
// This module's header file
#include "nandboot.h"
//copy form evmdm365_v1\include
#include "evmdm365.h"
#include "evmdm365_gpio.h"
/************************************************************
* Explicit External Declarations *
************************************************************/
extern __FAR__ Uint32 EMIFStart;
#define REG(x) (*( volatile Uint32* )(x))
#define OSD_REG_BASE_ADDR (0x1c71c00)
#define OSD_REG(x) REG(x+OSD_REG_BASE_ADDR)
#define VENC_REG_BASE_ADDR (0x1c71e00)
#define VENC_REG(x) REG(x+VENC_REG_BASE_ADDR)
//#define START_MEN_LOCALE
#ifdef START_MEN_LOCALE
#define FRAME_BUFFER_ADDR 0x80000000
#else
#define FRAME_BUFFER_ADDR 0x84400000
#endif
#define LOG_DATA_FLASH_START_BLOCK (480) //0x3C00000
//800*480*4 = 1536000 = 11.71875 blocks
#define LOG_DATA_BLOCKS (11)
#define LOG_DATA_PAGES_IN_LAST_BLOCK (45)
void LogoDataCopy()
{
NAND_InfoHandle hNandInfo;
Uint32 pageNum,blockNum; /* the first block */
Uint8 *rxBuf = (Uint8 *)FRAME_BUFFER_ADDR; /* try RAM receive buffer with frame buffer address */
hNandInfo = NAND_open((Uint32)&EMIFStart, (Uint8) DEVICE_emifBusWidth());
if (hNandInfo == NULL)
{
return;
}
//read the logo data
for(blockNum = LOG_DATA_FLASH_START_BLOCK; blockNum < LOG_DATA_FLASH_START_BLOCK + LOG_DATA_BLOCKS; blockNum++)
{
/* let's try to fill the memory with data block */
for(pageNum=0; pageNum < hNandInfo->pagesPerBlock; pageNum++)
{
if(NAND_readPage(hNandInfo,blockNum,pageNum,rxBuf) != E_PASS)
{
DEBUG_printHexInt(blockNum);
DEBUG_printString(",");
DEBUG_printHexInt(pageNum);
DEBUG_printString("! ");
continue;
}
rxBuf += hNandInfo->dataBytesPerPage;
}
}
/* try to read the last block if any */
for(pageNum=0; pageNum <= LOG_DATA_PAGES_IN_LAST_BLOCK; pageNum++)
{
if(NAND_readPage(hNandInfo,blockNum,pageNum,rxBuf) != E_PASS)
{
DEBUG_printHexInt(blockNum);
DEBUG_printString(",");
DEBUG_printHexInt(pageNum);
DEBUG_printString("! ");
continue;
}
rxBuf += hNandInfo->dataBytesPerPage;
}
}
void vpss_init()
{
/*
* Setup clocking / DACs
*/
VDAC_CONFIG = 0x081141CC; // Take DACs out of power down mode
VPSS_CLKCTL = 0x00000018; // Enable DAC and VENC clock, both at 27 MHz
VPSS_VPBE_CLK_CTRL = 0x00000011; // Select enc_clk*1, turn on VPBE clk
VENC_CLKCTL = 0x00000001; // Enable venc & digital LCD clock
//map
//Frame buffer address OSD registers base address = 0x1c71c00
//bit bit offset Register name description
//[31-28]=0x8 bit[12-9] 20h OSDWIN0OFST Bitmap Window 0 Offset
//[27-21]=0x22 bit[6-0] 34h OSDWINADH BMP Window 0/1 Address - High
//[20-5] =0x0 bit[12-0] 38h OSDWIN0ADL BMP Window 0 Address - Low
//[4-0] 丢弃
// frame buffer address = 0x8440 0000 [ 0x8070 0000 - 0x8440 0000 ] = 61M
// 20h = 0x00001000 | 64 (rgb888, 800*32/256=100=0x64)
// 34h = 0x00000012;
// 38h = 0x00000000;
/* init OSD */
//note:!
OSD_REG(0x0008)=0x00005039;
// OSD_REG(0x0008)=0x00005038;
OSD_REG(0x000c)=0x000010f8;
OSD_REG(0x0020)=0x00001064;
// OSD_REG(0x0034)=0; //0x80000000
/* checking : should be 22 ? to 0x84400000 */
// OSD_REG(0x0034)=0x00000012;
OSD_REG(0x0034)=0x00000022;
OSD_REG(0x0040)=0x00000030; OSD_REG(0x0044)=0x00000014;
OSD_REG(0x0070)=0x00000320; OSD_REG(0x0074)=0x000001e0;
OSD_REG(0x00e4)=0x00000400;
OSD_REG(0x00e8)=0x00000040;
/* init venc */
VENC_REG(0x0000)=0x00002011; VENC_REG(0x0004)=0x00002000;
VENC_REG(0x000c)=0x0000000f;
VENC_REG(0x0010)=0x00000001; VENC_REG(0x0014)=0x00000001;
VENC_REG(0x0018)=0x00000363; VENC_REG(0x001c)=0x00000030;
VENC_REG(0x0020)=0x00000320; VENC_REG(0x0024)=0x000001fc;
VENC_REG(0x0028)=0x00000014; VENC_REG(0x002c)=0x000001e0;
VENC_REG(0x0040)=0x0000ff00;
VENC_REG(0x004c)=0x00000001;
VENC_REG(0x0064)=0x00000800;
VENC_REG(0x0068)=0x00000001;
VENC_REG(0x00cc)=0x0000017a;
VENC_REG(0x00e0)=0x00000100;
VENC_REG(0x0100)=0x00000400; VENC_REG(0x0104)=0x0000057c;
VENC_REG(0x0108)=0x00000159; VENC_REG(0x010c)=0x000002cb;
VENC_REG(0x0110)=0x000006ee; VENC_REG(0x0114)=0x00000400;
VENC_REG(0x0118)=0x0000057c; VENC_REG(0x011c)=0x00000159;
VENC_REG(0x0120)=0x000002cb; VENC_REG(0x0124)=0x000006ee;
VENC_REG(0x012c)=0x00000000;
VENC_REG(0x0130)=0x00000001;
VENC_REG(0x0140)=0x00000011;
VENC_REG(0x0170)=0x0000d642;
VENC_REG(0x01e8)=0x00000087; VENC_REG(0x01ec)=0x0000ffe7;
VENC_REG(0x01f0)=0x00000008;
}
void init_lcd()
{
DEVICE_pinmuxControl(1,0xFFFFFFFF,0x2A5555); // VCLOCK B2 R2 LCD_OE HSYNC VSYNC B3 B4 B5 B6, B7 G2 G3 G4
DEVICE_pinmuxControl(4,0x30003CFF,0x00003CFF); // GIO41, R1 R0, G1 G0 B1 B0
vpss_init();
//23 , 41 = high
DEVICE_pinmuxControl(3,3<<26,0); // GIO23
DEVICE_pinmuxControl(3,3<<28,0); // GIO41
EVMDM365_GPIO_setOutput(GPIO23, 1);
EVMDM365_GPIO_setDirection(GPIO23, GPIO_OUT); /* gio23 */
/*gio 41 low*/
EVMDM365_GPIO_setOutput(GPIO41, 0);
EVMDM365_GPIO_setDirection(GPIO41, GPIO_OUT); /* gio41 */
#if 0
/* Set LCD_OE low */
EVMDM365_GPIO_setOutput(82, 1);
EVMDM365_GPIO_setDirection(82, GPIO_OUT);
PINMUX1 |= 0x00020000; // Set LCD_OE as GIO82
#endif
LogoDataCopy();
/* now we can enable lcd */
EVMDM365_GPIO_setOutput(GPIO41, 1); /* gio 41 high */
}
