LTE-A Smartphone Application Processor
Technical Brief
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Figure 2-24. MSDC device clock timing diagram of HS200 .................................................................... 59
Figure 2-25. MSDC device input timing diagram of HS200 .................................................................... 59
Figure 2-26. MSDC device output timing diagram of HS200 ................................................................. 59
Figure 2-27. MSDC device input timing diagram of HS400 .................................................................... 60
Figure 2-28. MSDC device output timing diagram of HS400 .................................................................. 61
Figure 2-29. Power-on sequence ............................................................................................................... 64
Figure 2-30. Block diagram of BBRX-ADC ............................................................................................... 66
Figure 2-31. Block diagram of BBTX ..........................................................................................................67
Figure 2-32. Block diagram of ETDAC .......................................................................................................67
Figure 2-33. Block diagram of DETADC ................................................................................................... 68
Figure 2-34. Block diagram of APC-DAC .................................................................................................. 69
Figure 2-35. Outlines and dimensions of VFBGA 11mm*11.8mm, 599-ball, 0.9mm pitch package ...... 72
Figure 2-36. Top marking of MT6771V/C .................................................................................................. 72
Figure 2-37. Top marking of MT6771V/W ................................................................................................. 73
Table 2-1. Pin coordinate LPDDR4 ............................................................................................................ 19
Table 2-2. Pin coordinate LPDDR3 ........................................................................................................... 23
Table 2-3. Acronym for pin type ................................................................................................................ 28
Table 2-4. Detailed pin description ........................................................................................................... 28
Table 2-5. Acronym for table of state of pins ............................................................................................ 40
Table 2-6. Absolute maximum ratings for power supply .......................................................................... 41
Table 2-7. Recommended operating conditions for power supply .......................................................... 42
Table 2-8. RTC DC electrical characteristics (DVDD18_IOLT =1.8V) .................................................... 44
Table 2-9. SPI, I2S DC electrical characteristics (DVDD18_IORB =1.8V) ............................................. 44
Table 2-10. I2C0, I2C1, I2C2 DC electrical characteristics (DVDD18_IORB =1.8V) ............................. 44
Table 2-11. I2C3 DC electrical characteristics (DVDD18_IOLB =1.8V) .................................................. 45
Table 2-12. MSDC0 DC electrical characteristics (DVDD28_MSDC0=1.8V) ........................................ 45
Table 2-13. MSDC1 DC electrical characteristics (DVDD28_MSDC1=2.8V/3.3V) ................................ 45
Table 2-14. MSDC1 DC electrical characteristics (DVDD28_MSDC1=1.8V) .......................................... 45
Table 2-15. SIM DC electrical characteristics ........................................................................................... 46
Table 2-16. LPDDR3 AC timing parameter table of external memory interface .................................... 49
Table 2-17. LPDDR4/LPDDR4X AC timing parameter table of external memory interface ................. 50
Table 2-18. SPI AC timing parameters ....................................................................................................... 51
Table 2-19. I2S AC timing parameters ....................................................................................................... 51
Table 2-20. I2C AC timing parameters ..................................................................................................... 52
Table 2-21. MSDC device AC timing parameters of default speed .......................................................... 54
Table 2-22. MSDC device AC timing parameters of high speed ............................................................... 55
Table 2-23. MSDC device AC timing parameters of SDR12/SDR25/SDR50/SDR104 mode ................ 56
Table 2-24. MSDC device AC timing parameters of DDR50 speed mode ............................................... 58
Table 2-25. MSDC device AC timing parameters of HS200 .................................................................... 60
Table 2-26. MSDC device AC timing parameters of HS400 ..................................................................... 61
Table 2-27. SIM AC timing parameters ..................................................................................................... 62
Table 2-28. Mode selection ........................................................................................................................ 63
Table 2-29. Constant tied pins ................................................................................................................... 63
Table 2-30. Baseband downlink specifications ......................................................................................... 66
Table 2-31. BBTX specifications .................................................................................................................67
Table 2-32. ETDAC specifications ............................................................................................................. 68
Table 2-33. DETADC specifications .......................................................................................................... 69
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