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AMBA-AXI 协议详解, FPGA设计必备
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AMBA_AXI 协议详解, FPGA设计必备,axi设计指南
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Introduction to AMBA AXI4
Non-Confidential
Issue 0101
Copyright © 2020 Arm Limited (or its affiliates).
All rights reserved.
102202
Introduction to AMBA AXI4
102202
Issue
01
Copyright © 2020 Arm Limited (or its affiliates). All rights reserved.
Non-Confidential
Page 2 of 60
Introduction to AMBA AXI4
Copyright
©
2020 Arm Limited (or its affiliates). All rights reserved.
Release information
Document history
Issue Date Confidentiality Change
01 25 August 2020 Non-Confidential First release
Non-Confidential Proprietary Notice
This document is protected by copyright and other related rights and the practice or implementation of the
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Introduction to AMBA AXI4
102202
Issue
01
Copyright © 2020 Arm Limited (or its affiliates). All rights reserved.
Non-Confidential
Page 3 of 60
Copyright
©
2020 Arm Limited (or its affiliates). All rights reserved.
Arm Limited. Company 02557590 registered in England.
110 Fulbourn Road, Cambridge, England CB1 9NJ.
(LES-PRE-20349)
Confidentiality Status
This document is Non-Confidential. The right to use, copy and disclose this document may be subject to license
restrictions in accordance with the terms of the agreement entered into by Arm and the party that Arm
delivered this document to.
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Introduction
to AMBA AXI4
102202
Issue
01
Copyright © 2020 Arm Limited (or its affiliates). All rights reserved.
Non-Confidential
Page 4 of 60
Contents
1 Overview ..................................................................................................................................................................... 6
2 What is AMBA, and why use it? ........................................................................................................................... 7
2.1 Where is AMBA used? ............................................................................................................................................................. 7
2.2 Why use AMBA? ......................................................................................................................................................................... 8
2.3 How has AMBA evolved?....................................................................................................................................................... 8
2.3.1 AMBA 1 ....................................................................................................................................................................................... 9
2.3.2 AMBA 2 ....................................................................................................................................................................................... 9
2.3.3 AMBA 3 ....................................................................................................................................................................................... 9
2.3.4 AMBA 4 .................................................................................................................................................................................... 10
2.3.5 AMBA 5 .................................................................................................................................................................................... 10
3 AXI protocol overview ........................................................................................................................................ 11
3.1 AXI in a multi-master system ............................................................................................................................................ 12
3.2 AXI channels .............................................................................................................................................................................. 14
3.3 Main AXI features ................................................................................................................................................................... 15
4 Channel transfers and transactions ................................................................................................................ 17
4.1 Channel handshake ................................................................................................................................................................ 17
4.2 Differences between transfers and transactions .................................................................................................. 17
4.3 Channel transfer examples ................................................................................................................................................ 19
4.4 Write transaction: single data item ............................................................................................................................... 21
4.5 Write transaction: multiple data items ....................................................................................................................... 23
4.6 Read transaction: single data item ................................................................................................................................ 24
4.7 Read transaction: multiple data items ......................................................................................................................... 26
4.8 Active transactions ................................................................................................................................................................ 27
5 Channel signals....................................................................................................................................................... 29
5.1 Write channel signals ............................................................................................................................................................ 29
5.2 Read channel signals ............................................................................................................................................................. 30
5.3 Data size, length, and burst type .................................................................................................................................... 32
5.4 Protection level support ..................................................................................................................................................... 32
5.5 Cache support ........................................................................................................................................................................... 33
Introduction to AMBA AXI4
102202
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01
Copyright © 2020 Arm Limited (or its affiliates). All rights reserved.
Non-Confidential
Page 5 of 60
5.6 Response signaling ................................................................................................................................................................. 35
5.7 Write data strobes ................................................................................................................................................................. 35
5.8 Atomic accesses with the lock signal ............................................................................................................................ 36
5.9 Quality of service .................................................................................................................................................................... 37
5.10 Region signaling .................................................................................................................................................................... 38
5.11 User signals .............................................................................................................................................................................. 38
5.12 AXI channel dependencies .............................................................................................................................................. 39
6 Atomic accesses ..................................................................................................................................................... 40
6.1 Locked accesses ....................................................................................................................................................................... 40
6.2 Exclusive accesses .................................................................................................................................................................. 42
6.3 Exclusive access hardware monitor operation ....................................................................................................... 42
6.4 Exclusive transaction pairs: both pass ......................................................................................................................... 43
6.5 Exclusive transaction pairs: one pass, one fail ........................................................................................................ 45
7 Transfer behavior and transaction ordering ................................................................................................ 47
7.1 Examples of simple transactions .................................................................................................................................... 47
7.2 Transfer IDs ............................................................................................................................................................................... 49
7.3 Write transaction ordering rules ................................................................................................................................... 50
7.4 Read transaction ordering rules ..................................................................................................................................... 51
7.5 Read and write channel ordering ................................................................................................................................... 53
7.6 Unaligned transfer start address ................................................................................................................................... 54
7.7 Endianness support ............................................................................................................................................................... 55
7.8 Read and write interface attributes ............................................................................................................................. 56
8 Check your knowledge ........................................................................................................................................ 58
9 Related information ............................................................................................................................................. 59
10 Next steps .............................................................................................................................................................. 60
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