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ADN4604

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4.25 Gbps,

16 × 16

ital Cross

oint Switch

ADN4604

Rev. 0

Information furnished by Analog Devices is believed to be accurate and reliable. However, no

responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other

rights of third parties that may result from its use. Specifications subject to change without notice. No

license is granted by implication or otherwise under any patent or patent rights of Analog Devices.

Trademarks and registered trademarks are the property of their respective owners.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Tel: 781.329.4700 www.analog.com

FEATURES

DC to 4.25 Gbps per port NRZ data rate

Programmable receive equalization

12 dB boost at 2 GHz

Compensates 40 inches of FR4 at 4.25 Gbps

Programmable transmit preemphasis/deemphasis

Up to 12 dB boost at 4.25 Gbps

Compensates 40 inches of FR4 at 4.25 Gbps

Low power: 130 mW per channel at 3.3 V (outputs enabled)

16 × 16, fully differential, nonblocking array

Double rank connection programming with dual

connection maps

Low jitter, typically 20 ps

Flexible I/O supply range

DC- or ac-coupled differential CML inputs

Programmable CML output levels

Per-lane input P/N pair inversion for routing ease

50 Ω on-chip I/O termination

Supports 8b/10b, scrambled or uncoded NRZ data

Serial (I

C slave or SPI) control interface

100-lead TQFP, Pb-free package

APPLICATIONS

Fiber optic network switching

High speed serial backplane routing to OC-48 with FEC

XAUI: 10GBASE-KX4

Gigabit Ethernet over backplane: 1000BASE-KX

1×, 2×, and 4× Fibre Channel

InfiniBand®

Digital video (HDMI, DVI, DisplayPort, 3G-/HD-/SD-SDI)

Data storage networks

FUNCTIONAL BLOCK DIAGRAM

RX TX

PRE-

EMPHASIS

16 × 16

SWITCH

MATRIX

CONNECTION

MAP 0

CONNECTION

MAP 1

PER-PORT

OUTPUT

LEVEL

SETTINGS

OUTPUT

LEVEL

HOOKUP

TABLE

ADN4604

SERIAL

INTERFACE

CONTROL

LOGIC

OP[15:0]

TTON

TTOS

ON[15:0]

IP[15:0]

TTIE

TTIW

IN[15:0]

I2C/SPI

ADDR1/SDI

SDA/SDO

SCL/SCK

RESET

UPDATE

ADDR0/CS

07934-001

Figure 1.

GENERAL DESCRIPTION

The ADN4604 is a 16 × 16 asynchronous, protocol agnostic,

digital crosspoint switch, with 16 differential PECL-/CML-

compatible inputs and 16 differential CML outputs.

The ADN4604 is optimized for nonreturn-to-zero (NRZ) sig-

naling with data rates of up to 4.25 Gbps per port. Each port

offers a fixed level of input equalization and programmable

output swing and output preemphasis.

The ADN4604 nonblocking switch core implements a 16 × 16

crossbar and supports independent channel switching through

the serial control interface. The ADN4604 has low latency and

very low channel-to-channel skew.

An I

C® or SPI interface is used to control the device and pro-

vide access to advanced features, such as additional levels of

preemphasis and output disable.

The ADN4604 is packaged in a 100-lead TQFP package and

operates from −40°C to +85°C.

ADN4604

Rev. 0 | Page 2 of 40

TABLE OF CONTENTS

Features .............................................................................................. 1

Applications ....................................................................................... 1

Functional Block Diagram .............................................................. 1

General Description ......................................................................... 1

Revision History ............................................................................... 2

Specifications ..................................................................................... 3 

Electrical Specifications ............................................................... 3

C Timing Specifications ............................................................ 4

SPI Timing Specifications ........................................................... 5

Absolute Maximum Ratings ............................................................ 6

ESD Caution .................................................................................. 6

Pin Configuration and Function Descriptions ............................. 7

Typical Performance Characteristics ........................................... 10

Theory of Operation ...................................................................... 16

Introduction ................................................................................ 16

Receivers ...................................................................................... 16

Switch Core ................................................................................. 17

Transmitters ................................................................................ 19

Termination ................................................................................. 23

C Serial Control Interface ........................................................... 24

Reset ............................................................................................. 24

C Data Write ............................................................................. 24

C Data Read .............................................................................. 25

SPI Serial Control Interface .......................................................... 26

Applications Information .............................................................. 32

Supply Sequencing ..................................................................... 34

Power Dissipation....................................................................... 34

Output Compliance ................................................................... 34

Printed Circuit Board (PCB) Layout Guidelines ................... 36

Outline Dimensions ....................................................................... 38

Ordering Guide .......................................................................... 38

REVISION HISTORY

10/09—Revision 0: Initial Version

ADN4604

Rev. 0 | Page 3 of 40

SPECIFICATIONS

ELECTRICAL SPECIFICATIONS

= 3.3 V, V

TTIx

= 3.3 V, V

TTOx

= 3.3 V, DV

= 3.3 V, V

= 0 V, R

= 50 Ω, data rate = 4.25 Gbps, ac-coupled inputs and outputs, differential

input swing = 800 mV p-p, T

= 27°C, unless otherwise noted.

Table 1.

Parameter Conditions Min Typ Max Unit

DYNAMIC PERFORMANCE

Data Rate (DR) per Channel (NRZ) DC 4.25 Gbps

Deterministic Jitter Data rate = 4.25 Gbps, no channel 20 ps p-p

Random Jitter RMS, no channel 1 ps rms

Residual Deterministic Jitter with

Receive Equalization

Data rate = 4.25 Gbps, 20 in. FR4, EQ boost = 12 dB 27 ps p-p

Data rate = 4.25 Gbps, 30 in. FR4, EQ boost = 12 dB 43 ps p-p

Data rate = 4.25 Gbps, 40 in. FR4, EQ boost = 12 dB 70 ps p-p

Residual Deterministic Jitter with

Transmit Preemphasis

Data rate = 4.25 Gbps, 20 in. FR4, PE boost = 4.2 dB 23 ps p-p

Data rate = 4.25 Gbps, 30 in. FR4, PE boost = 6 dB 25 ps p-p

Data rate = 4.25 Gbps, 40 in. FR4, PE boost = 6 dB 35 ps p-p

Propagation Delay Input to output, EQ boost = 12 dB 800 ps

Channel-to-Channel Skew ±50 ps

Switching Time Update logic switching to 50% output data 100 ns

Output Rise/Fall Time 20% to 80% 75 ps

INPUT CHARACTERISTICS

Differential Input Voltage Swing V

ICM

= V

− 0.6 V; V

= V

MIN

to V

MAX

, T

= T

MIN

to T

MAX

200 2000 mV p-p diff

Input Voltage Range Single-ended absolute voltage level, V

+ 1.1 V

Single-ended absolute voltage level, V

+ 0.3 V

OUTPUT CHARACTERISTICS

Output Voltage Swing Differential, PE boost = 0 dB, default output level, at dc 600 800 900 mV p-p diff

Output Voltage Range Single-ended absolute voltage level, V

– 1.3 V

Single-ended absolute voltage level, V

+ 0.2 V

Per-Port Output Current PE boost = 0 dB, default output level 16 mA

PE boost = 6 dB, default output level 32 mA

TERMINATION CHARACTERISTICS

Resistance Single-ended, V

= 2.7 V to 3.6 V, V

TTI

= 2.2 V to 3.6 V,

TTO

= 2.2 V to 3.6 V, T

= T

MIN

to T

MAX

;

44 50 56 Ω

Temperature Coefficient 0.025 Ω/°C

POWER SUPPLY

Operating Range

= 0 V 2.7 3.3 3.6 V

TTIE

, V

TTIW

= 0 V 1.3 3.3 V

+ 0.3 V

TTON

, V

TTOS

= 0 V 2.2

3.3 V

+ 0.3 V

Supply Current Outputs disabled

95 110 mA

DVCC

20 35 mA

TTIE

+ I

TTIW

+ I

TTON

+ I

TTOS

0 10 mA

Supply Current All outputs enabled, ac-coupled I/O, 400 mV I/O swings

(800 mV p-p differential), PE boost = 0 dB,

50 Ω far-end terminations

342 370 mA

DVCC

20 35 mA

TTIE

+ I

TTIW

+ I

TTON

+ I

TTOS

256 280 mA

Supply Current All outputs enabled, ac-coupled I/O, 400 mV I/O swings

(800 mV p-p differential), PE boost = 6 dB,

50 Ω far-end terminations

486 540 mA

DVCC

20 35 mA

TTIE

+ I

TTIW

+ I

TTON

+ I

TTOS

512 540 mA

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