//******************************************************************************
//
// Copyright (c) 2014 Advantech Industrial Automation Group.
//
// Oxford PCI-954/952/16C950 with Advantech RS232/422/485 capacities
//
// This program is free software; you can redistribute it and/or modify it
// under the terms of the GNU General Public License as published by the Free
// Software Foundation; either version 2 of the License, or (at your option)
// any later version.
//
// This program is distributed in the hope that it will be useful, but WITHOUT
// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
// more details.
//
// You should have received a copy of the GNU General Public License along with
// this program; if not, write to the Free Software Foundation, Inc., 59
// Temple Place - Suite 330, Boston, MA 02111-1307, USA.
//
//
//
//******************************************************************************
//***********************************************************************
// File: serial.c
// Version: 3.40 [2014-06-12]
// Kernel: 2.4.x
// Author: Po-Cheng Chen
// Devices:
// UNO: UNO-2050[COM3/COM4] UNO-2059[COM1~COM4] UNOB-2201CB[COM1~COM8]
// UNO-2176[COM1~COM4] UNO-1150[COM2/COM3] UNO-2679 [COM3~COM6]
// UNO-4672 [COM3~COM10]
// ICOM: PCI-1601 PCI-1602 PCI-1603 PCI-1604
// PCI-1610 PCI-1611 PCI-1612 PCI-1620 PCI-1622
// MIC: MIC-3611 MIC-3612 MIC-3620 MIC-3621
// PCM: PCM-3614P/I PCM-3641P/I PCM-3618P/I PCM-3681P/I
// General COM Port Devices:
// A001, A002, A004 A101, A102, A104
// F001, F002, F004 F101, F102, F104
// A202, A304, A408
//
//***********************************************************************
//***********************************************************************
static char *serial_version = "3.40";
static char *serial_revdate = "06/12/2014";
#define PCI_VENDOR_ID_ADVANTECH 0x13fe
#define PCI_DEVICE_ID_ADVANTECH_PCI1600 0x1600 /* Internal */
#define PCI_DEVICE_ID_ADVANTECH_PCI1601 0x1601 /* Internal */
#define PCI_DEVICE_ID_ADVANTECH_PCI1602 0x1602 /* Internal */
#define PCI_DEVICE_ID_ADVANTECH_PCI1603 0x1603 /* Internal */
#define PCI_DEVICE_ID_ADVANTECH_PCI1604 0x1604 /* Internal */
#define PCI_DEVICE_ID_ADVANTECH_PCI16ff 0x16ff /* External */
#define PCI_DEVICE_ID_ADVANTECH_PCI1600_1601 0x1601
#define PCI_DEVICE_ID_ADVANTECH_PCI1600_1602 0x1602
#define PCI_DEVICE_ID_ADVANTECH_PCI1600_1610 0x1610
#define PCI_DEVICE_ID_ADVANTECH_PCI1600_1611 0x1611
#define PCI_DEVICE_ID_ADVANTECH_PCI1600_1612 0x1612 /* Also for UNO-2059 */
#define PCI_DEVICE_ID_ADVANTECH_PCI1600_1620 0x1620
#define PCI_DEVICE_ID_ADVANTECH_PCI1600_1622 0x1622
#define PCI_DEVICE_ID_ADVANTECH_UNO2050 0x2050
#define PCI_DEVICE_ID_ADVANTECH_UNOB2201 0x2201
#define PCI_DEVICE_ID_ADVANTECH_UNOBF201 0xf201
#define PCI_DEVICE_ID_ADVANTECH_UNOBX201_2201 0x2201
#define PCI_DEVICE_ID_ADVANTECH_MIC3620 0x3620
#define PCI_DEVICE_ID_ADVANTECH_MIC3612 0X3612
#define PCI_DEVICE_ID_ADVANTECH_MIC3611 0X3611
//yongjun add 2006/11/08
#define PCI_DEVICE_ID_ADVANTECH_UNO2176 0x2176
#define PCI_DEVICE_ID_ADVANTECH_UNO2X76_2176 0x2176
//james dai add 2007/5/28
//DEVICE ID
#define PCI_DEVICE_ID_ADVANTECH_PCM3614P 0x3614 //PCM-3614P
#define PCI_DEVICE_ID_ADVANTECH_PCM3641P 0x3641 //PCM-3641P
#define PCI_DEVICE_ID_ADVANTECH_PCM3618P 0x3618 //PCM-3618P
#define PCI_DEVICE_ID_ADVANTECH_PCMF618P 0xF618 //PCM-3618P
#define PCI_DEVICE_ID_ADVANTECH_PCM3681P 0x3681 //PCM-3681P
#define PCI_DEVICE_ID_ADVANTECH_PCMF681P 0xF681 //PCM-3681P
#define PCI_SUB_VENDOR_ID_ADVANTECH_PCM3614P 0x3614 //PCM-3614P
#define PCI_SUB_VENDOR_ID_ADVANTECH_PCM3618P 0x3618 //PCM-3618P
#define PCI_SUB_VENDOR_ID_ADVANTECH_PCM3641P 0x3641 //PCM-3641P
#define PCI_SUB_VENDOR_ID_ADVANTECH_PCM3681P 0x3681 //PCM-3681P
//james dai add end
//james dai add to support UNO-1150
#define PCI_DEVICE_ID_ADVANTECH_UNO1150 0x3610 //UNO-1150
//james dai add end
//james dai add to support MIC-3621
#define PCI_DEVICE_ID_ADVANTECH_MIC3621 0x3621
#define PCI_SUB_VENDOR_ID_ADVANTECH_MIC3621 0x3621
//james dai add end
#define PCI_DEVICE_ID_ADVANTECH_A001 0xA001
#define PCI_DEVICE_ID_ADVANTECH_A002 0xA002
#define PCI_DEVICE_ID_ADVANTECH_A004 0xA004
#define PCI_DEVICE_ID_ADVANTECH_A101 0xA101
#define PCI_DEVICE_ID_ADVANTECH_A102 0xA102
#define PCI_DEVICE_ID_ADVANTECH_A104 0xA104
#define PCI_DEVICE_ID_ADVANTECH_F001 0xF001
#define PCI_DEVICE_ID_ADVANTECH_F002 0xF002
#define PCI_DEVICE_ID_ADVANTECH_F004 0xF004
#define PCI_DEVICE_ID_ADVANTECH_F101 0xF101
#define PCI_DEVICE_ID_ADVANTECH_F102 0xF102
#define PCI_DEVICE_ID_ADVANTECH_F104 0xF104
#define PCI_DEVICE_ID_ADVANTECH_PCIE952 0xA202
#define PCI_DEVICE_ID_ADVANTECH_PCIE954 0xA304
#define PCI_DEVICE_ID_ADVANTECH_PCIE958 0xA408
#define PCI_DEVICE_ID_ADVANTECH_A821 0xA821
#define PCI_DEVICE_ID_ADVANTECH_A822 0xA822
#define PCI_DEVICE_ID_ADVANTECH_A823 0xA823
#define PCI_DEVICE_ID_ADVANTECH_A824 0xA824
#define PCI_DEVICE_ID_ADVANTECH_A828 0xA828
#define PCI_DEVICE_ID_ADVANTECH_A831 0xA831
#define PCI_DEVICE_ID_ADVANTECH_A832 0xA832
#define PCI_DEVICE_ID_ADVANTECH_A833 0xA833
#define PCI_DEVICE_ID_ADVANTECH_A834 0xA834
#define PCI_DEVICE_ID_ADVANTECH_A838 0xA838
#define PCI_DEVICE_ID_ADVANTECH_A516 0xA516
#define PCI_DEVICE_ID_ADVANTECH_F500 0xF500
#define ACR_DTR_RS232 0x00
#define ACR_DTR_ACTIVE_LOW_RS485 0x10
#define ACR_DTR_ACTIVE_HIGH_RS485 0x18
#define UART_TYPE_AUTO 0
#define UART_TYPE_RS232 1
#define UART_TYPE_RS485 2
#ifndef SERIAL_NAME
#define SERIAL_NAME "ttyP"
#endif
#ifndef CALLOUT_NAME
#define CALLOUT_NAME "ttyC"
#endif
#ifdef MODULE
#undef RS_TIMER
#define RS_TIMER 11
#endif
/*
* Serial driver configuration section. Here are the various options:
*
* CONFIG_HUB6
* Enables support for the venerable Bell Technologies
* HUB6 card.
*
* CONFIG_SERIAL_MANY_PORTS
* Enables support for ports beyond the standard, stupid
* COM 1/2/3/4.
*
* CONFIG_SERIAL_MULTIPORT
* Enables support for special multiport board support.
*
* CONFIG_SERIAL_SHARE_IRQ
* Enables support for multiple serial ports on one IRQ
*
* CONFIG_SERIAL_DETECT_IRQ
* Enable the autodetection of IRQ on standart ports
*
* SERIAL_PARANOIA_CHECK
* Check the magic number for the async_structure where
* ever possible.
*
* CONFIG_SERIAL_ACPI
* Enable support for serial console port and serial
* debug port as defined by the SPCR and DBGP tables in
* ACPI 2.0.
*/
#include <linux/config.h>
#include <linux/version.h>
#undef SERIAL_PARANOIA_CHECK
#define CONFIG_SERIAL_NOPAUSE_IO
#define SERIAL_DO_RESTART
#if 0
/* These defines are normally controlled by the autoconf.h */
#define CONFIG_SERIAL_MANY_PORTS
#define CONFIG_SERIAL_SHARE_IRQ
#define CONFIG_SERIAL_DETECT_IRQ
#define CONFIG_SERIAL_MULTIPORT
#define CONFIG_HUB6
#endif
#ifdef CONFIG_PCI
#define ENABLE_SERIAL_PCI
#ifndef CONFIG_SERIAL_SHARE_IRQ
#define CONFIG_SERIAL_SHARE_IRQ
#endif
#ifndef CONFIG_SERIAL_MANY_PORTS
#define CONFIG_SERIAL_MANY_PORTS
#endif
#endif
#ifdef CONFIG_SERIAL_ACPI
#define ENABLE_SERIAL_ACPI
#endif
#if 0
#if defined(CONFIG_ISAPNP)|| (defined(CONFIG_ISAPNP_MODULE) && defined(MODULE))
#ifndef ENABLE_SERIAL_PNP
#define ENABLE_SERIAL_PNP
#endif
#endif
#endif
/* Set of debugging defines */
#undef SERIAL_DEBUG_INTR
#undef S