单片机89C52中英文对照翻译(经典版).doc

AT89C52 internal structure analysis

Description

The AT89S52 is a low-power, high-performance CMOS 8-bit

microcontroller with 8Kbytes of in-system programmable Flash

memory. The device is manufactured using Atmel’s high-density

nonvolatile memory technology and is patible with the

industry-standard 80C51 instruction set and pinout. The on-chip

following standard features: 8K bytes of Flash, 256 bytes of RAM,

32 I/O lines, Watchdog timer, two data pointers, three 16-bit

timer/counters, a six-vector two-level interrupt architecture, a full

duplex serial port, on-chip oscillator,and clock circuitry. In

addition, the AT89S52 is designed with static logic for

operationdown to zero frequency and supports two software

selectable power saving modes.The Idle Mode stops the CPU while

allowing the RAM, timer/counters, serial port, andinterrupt system

to continue functioning. The Power-down mode saves the RAM

contentsbut freezes the oscillator, disabling all other chip

Port 0

Port 0 is an 8-bit open drain bidirectional I/O port. As

anoutput port, each pin can sink eight TTL inputs. When 1sare

written to port 0 pins, the pins can be used as

highimpedanceinputs.Port 0 can also be configured to be the

multiplexed loworder address/data bus during accesses to external

program and data memory. In this mode, P0 has internal

pullups.Port 0 also receives the code bytes during Flash

programming and outputs the code bytes during program

verification.External pullups are required during program

pins that are externally being pulled low will source current (IIL)

because of the internal pullups. In addition, P1.0 and P1.1 can be

configured to be the timer/counter 2 external count input (P1.0/T2)

and the timer/counter 2 trigger input (P1.1/T2EX), respectively,

asshown in the following table.Port 1 also receives the low-order

address bytes duringFlash programming and verification.

Port 2

Port 2 is an 8-bit bidirectional I/O port with internal

pullups.ThePort 2 output buffers can sink/source four TTL

inputs.When 1s are written to Port 2 pins, they are pulled high

P2 Special Function Register. Port 2 also receives the high-order

address bits and some control signals during Flash programming

and verification.

Port 3

Port 3 is an 8-bit bidirectional I/O port with internal

pullups.ThePort 3 output buffers can sink/source four TTL

inputs.When 1s are written to Port 3 pins, they are pulled high by

the internal pullups and can be used as inputs. As inputs,Port 3

pins that are externally being pulled low will source current (IIL)

because of the pullups.Port 3 also serves the functions of various

special features of the AT89S52, as shown in the following

programming and verification.

RST

Reset input. A high on this pin for two machine cycles while

Address Latch Enable (ALE) is an output pulse for latching the