C45044以太网芯片手册资源-CSDN文库

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《C45044以太网芯片手册》详述了REALTEK（瑞昱）公司生产的RTL8201F-VB-CG、RTL8201FL-VB-CG和RTL8201FN-VB-CG三款单端口10/100M以太网PHY收发器芯片。这些芯片集成了自动MDIX功能，是网络设备中的关键组件，用于实现物理层的数据传输。 RTL8201F系列芯片是单芯片单端口的以太网物理层(PHY)收发器，支持10Mbps和100Mbps两种工作模式。它们具备自动检测并配置连接器类型的能力，即自动MDIX功能，可以自动识别直通线和交叉线，并进行相应的连接设置，极大地简化了网络设备的部署和维护。文档中提到的“DATASHEET (CONFIDENTIAL: Development Partners Only)”表明这是一份专为开发合作伙伴提供的机密资料，包含了详细的规格和技术参数。尽管文档的日期为2011年11月30日，但REALTEK半导体公司保留随时对文档或产品进行改进和更改的权利。此外，REALTEK还强调了文档的版权信息，禁止未经许可的复制、传播、转录和存储行为。文档中列出了REALTEK的商标声明，包括“REALTEK”以及可能提及的其他品牌名称，这些都是各自所有者的注册商标或商标。文档还指出，该产品涉及多项专利，包括美国的几项专利号，体现了REALTEK在以太网技术领域的知识产权保护。文档的使用指南部分提醒读者，虽然已尽力确保文档的准确性和完整性，但可能存在技术上的不准确或排版错误。因此，建议读者在使用时结合最新的技术信息和更新来参考。修订历史部分记录了文档的版本更新，从1.0到1.1的修订中，芯片模型更改为VB模型，并对表22的寄存器30进行了修正，反映了REALTEK对产品文档持续改进的过程。 C45044以太网芯片手册提供了关于RTL8201F系列芯片的全面技术信息，包括其功能、特性、操作模式以及与之相关的软件编程细节，对于设计和开发基于以太网的网络设备的工程师来说，是不可或缺的技术参考资料。

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RTL8201F-VB-CG

RTL8201FL-VB-CG

RTL8201FN-VB-CG

SINGLE-CHIP/PORT 10/100M ETHERNET

PHYCEIVER WITH AUTO MDIX

DATASHEET

(CONFIDENTIAL: Development Partners Only)

Rev. 1.4

30 November 2011

Track ID: JATR-2265-11

Realtek Semiconductor Corp.

No. 2, Innovation Road II, Hsinchu Science Park, Hsinchu 300, Taiwan

Tel.: +886-3-578-0211. Fax: +886-3-577-6047

www.realtek.com

RTL8201F/RTL8201FL/RTL8201FN

Datasheet

Single-Chip/Port 10/100M Ethernet PHYceiver with Auto MDIX iii Track ID: JATR-2265-11 Rev. 1.4

REVISION HISTORY

Revision Release Date Summary

1.0 2010/12/17 First release.

1.1 2011/02/18 Revised to VB model.

Revised Table 22 Register 30 Interrupt Indicators and SNR Display Register, page 21.

Added interrupt function.

Added MMD Register Mapping and Definition section.

Revised section 8.2 Interrupt, page 31.

Revised Table 46 Absolute Maximum Ratings, page 44.

Revised 9.1.3 Power On and PHY Reset Sequence, page 45.

Revised Table 49 RMII Input Mode Power Dissipation (Whole System), page 46.

1.2 2011/04/21 Revised Figure 2 Block Diagram, page 4.

Revised Table 3 RMII Interface, page 10.

Revised Table 7 Device Configuration Interface, page 11.

Revised Table 9 Reset and Other Pins, page 14.

Revised Table 11 Register 0 Basic Mode Control Register, page 15.

Revised Table 15 Register 4 Auto-Negotiation Advertisement Register (ANAR), page 17.

Revised Table 20 Register 24, page 20.

Revised Table 24 Page4 Register 16 EEE Capability Enable Register, page 22.

Revised Table 25 Page4 Register 21 EEE Capability Register, page 22.

Revised Table 30 Page7 Register 19 , page 24.

Added section 7.21 Page 7 Register 24 Spread Spectrum Clock Register, page 25.

Revised section 8.1.2 Serial Management Interface, page 29.

Revised section 8.7 Reset and Transmit Bias, page 38.

Added section 8.13 Spread Spectrum Clock (SSC), page 43.

Added Figure 21 MII Interface Setup/Hold Time Definitions, page 47.

Added Figure 26 RMII Interface Setup, Hold Time, and Output Delay Time Definitions,

page 49.

Added Figure 28 MDC/MDIO Interface Setup, Hold Time, and Valid from MDC Rising Edge

Time Definitions, page 51.

1.3 2011/07/14 Added Figure 1 Application Diagram, page 3.

Revised Table 30 Page7 Register 19 Interrupt, WOL Enable, and LEDs Function Registers,

page 24.

Added Table 34 EEEPC1R (PCS Control 1 Register, MMD Device 3, Address 0x00), page 25.

Added Table 35 EEEPS1R (PCS Status 1 Register, MMD Device 3, Address 0x01), page 26.

Added section 8.4.1 LED and PHY Address, page 32.

Added section 8.4.8 EEE LED, page 36.

Revised section 8.7 Reset and Transmit Bias, page 38.

1.4 2011/11/30 Revised Figure 2 Block Diagram, page 4.

Revised Table 4 Clock Interface, page 10 (CKXTAL2 pin revised from I to IO).

RTL8201F/RTL8201FL/RTL8201FN

Datasheet

Single-Chip/Port 10/100M Ethernet PHYceiver with Auto MDIX iv Track ID: JATR-2265-11 Rev. 1.4

Table of Contents

1. GENERAL DESCRIPTION..............................................................................................................................................1

2. FEATURES.........................................................................................................................................................................2

3. APPLICATIONS ................................................................................................................................................................3

3.1. APPLICATION DIAGRAM...............................................................................................................................................3

4. BLOCK DIAGRAM...........................................................................................................................................................4

5. PIN ASSIGNMENTS .........................................................................................................................................................5

5.1. RTL8201F (32-PIN).....................................................................................................................................................5

5.2. GREEN PACKAGE AND VERSION IDENTIFICATION ........................................................................................................5

5.3. RTL8201FL (48-PIN) ..................................................................................................................................................6

5.4. GREEN PACKAGE AND VERSION IDENTIFICATION ........................................................................................................6

5.5. RTL8201FN (48-PIN)..................................................................................................................................................7

5.6. GREEN PACKAGE AND VERSION IDENTIFICATION ........................................................................................................7

6. PIN DESCRIPTIONS.........................................................................................................................................................8

6.1. MII INTERFACE ............................................................................................................................................................8

6.2. SERIAL MANAGEMENT INTERFACE ............................................................................................................................10

6.3. RMII INTERFACE .......................................................................................................................................................10

6.4. CLOCK INTERFACE.....................................................................................................................................................10

6.5. 10MBPS/100MBPS NETWORK INTERFACE .................................................................................................................11

6.6. TRANSMIT BIAS REFERENCE......................................................................................................................................11

6.7. DEVICE CONFIGURATION INTERFACE ........................................................................................................................11

6.8. POWER AND GROUND PINS ........................................................................................................................................13

6.9. RESET AND OTHER PINS.............................................................................................................................................14

6.10. NC (NOT CONNECTED) PINS ......................................................................................................................................14

7. REGISTER DESCRIPTIONS.........................................................................................................................................15

7.1. REGISTER 0 BASIC MODE CONTROL REGISTER..........................................................................................................15

7.2. REGISTER 1 BASIC MODE STATUS REGISTER .............................................................................................................16

7.3. REGISTER 2 PHY IDENTIFIER REGISTER 1..................................................................................................................17

7.4. REGISTER 3 PHY IDENTIFIER REGISTER 2..................................................................................................................17

7.5. REGISTER 4 AUTO-NEGOTIATION ADVERTISEMENT REGISTER (ANAR) ...................................................................17

7.6. REGISTER 5 AUTO-NEGOTIATION LINK PARTNER ABILITY REGISTER (ANLPAR)....................................................18

7.7. REGISTER 6 AUTO-NEGOTIATION EXPANSION REGISTER (ANER) ............................................................................19

7.8. PAGE 0 REGISTER 13 MACR (MMD ACCESS CONTROL REGISTER; ADDRESS 0X0D) ...............................................20

7.9. PAGE 0 REGISTER 14 MAADR (MMD ACCESS ADDRESS DATA REGISTER; ADDRESS 0X0E)...................................20

7.10. REGISTER 24 POWER SAVING MODE REGISTER (PSMR) ...........................................................................................20

7.11. REGISTER 28 FIBER MODE AND LOOPBACK REGISTER...............................................................................................21

7.12. REGISTER 30 INTERRUPT INDICATORS AND SNR DISPLAY REGISTER ........................................................................21

7.13. REGISTER 31 PAGE SELECT REGISTER .......................................................................................................................21

7.14. PAGE 4 REGISTER 16 EEE CAPABILITY ENABLE REGISTER .......................................................................................22

7.15. PAGE 4 REGISTER 21 EEE CAPABILITY REGISTER .....................................................................................................22

7.16. PAGE 7 REGISTER 16 RMII MODE SETTING REGISTER (RMSR)................................................................................22

7.17. PAGE 7 REGISTER 17 CUSTOMIZED LEDS SETTING REGISTER...................................................................................23

7.18. PAGE 7 REGISTER 18 EEE LEDS ENABLE REGISTER .................................................................................................23

7.19. PAGE 7 REGISTER 19 INTERRUPT, WOL ENABLE, AND LEDS FUNCTION REGISTERS ................................................24

7.20. PAGE 7 REGISTER 20 MII TX ISOLATE REGISTER ......................................................................................................25

7.21. PAGE 7 REGISTER 24 SPREAD SPECTRUM CLOCK REGISTER ......................................................................................25

7.22. MMD REGISTER MAPPING AND DEFINITION .............................................................................................................25

7.22.1. EEEPC1R (PCS Control 1 Register, MMD Device 3, Address 0x00) .............................................................25

RTL8201F/RTL8201FL/RTL8201FN

Datasheet

Single-Chip/Port 10/100M Ethernet PHYceiver with Auto MDIX v Track ID: JATR-2265-11 Rev. 1.4

7.22.2. EEEPS1R (PCS Status 1 Register, MMD Device 3, Address 0x01) ................................................................26

7.22.3. EEECR (EEE Capability Register, MMD Device 3; Address 0x14)................................................................26

7.22.4. EEEWER (EEE Wake Error Register, MMD Device 3; Address 0x16) ..........................................................26

7.22.5. EEEAR (EEE Advertisement Register, MMD Device 7; Address 0x3c) ..........................................................27

7.22.6. EEELPAR (EEE Link Partner Ability Register, MMD Device 7; Address 0x3d) ............................................27

8. FUNCTIONAL DESCRIPTION.....................................................................................................................................28

8.1. MII AND MANAGEMENT INTERFACE..........................................................................................................................29

8.1.1. Data Transition ....................................................................................................................................................29

8.1.2. Serial Management Interface ...............................................................................................................................29

8.2. INTERRUPT .................................................................................................................................................................31

8.3. AUTO-NEGOTIATION AND PARALLEL DETECTION .....................................................................................................31

8.3.1. Setting the Medium Type and Interface Mode to MAC.........................................................................................31

8.4. LED FUNCTIONS........................................................................................................................................................32

8.4.1. LED and PHY Address .........................................................................................................................................32

8.4.2. Link Monitor.........................................................................................................................................................32

8.4.3. RX LED ................................................................................................................................................................33

8.4.4. TX LED.................................................................................................................................................................33

8.4.5. TX/RX LED...........................................................................................................................................................34

8.4.6. LINK/ACT LED ....................................................................................................................................................34

8.4.7. Customized LED...................................................................................................................................................35

8.4.8. EEE LED Behavior...............................................................................................................................................36

8.5. POWER DOWN AND LINK DOWN POWER SAVING MODES..........................................................................................36

8.6. 10M/100M TRANSMIT AND RECEIVE.........................................................................................................................37

8.6.1. 100Base-TX Transmit and Receive Operation .....................................................................................................37

8.6.2. 100Base-FX Fiber Transmit and Receive Operation ...........................................................................................37

8.6.3. 10Base-T Transmit and Receive Operation..........................................................................................................37

8.7. RESET AND TRANSMIT BIAS.......................................................................................................................................38

8.8. 3.3V POWER SUPPLY AND VOLTAGE CONVERSION CIRCUIT......................................................................................38

8.9. AUTOMATIC POLARITY CORRECTION ........................................................................................................................39

8.10. FAR END FAULT INDICATION .....................................................................................................................................39

8.11. WAKE-ON-LAN (WOL)............................................................................................................................................39

8.11.1. Magic Packet and Wake-Up Frame Format....................................................................................................39

8.11.2. Active Low Wake-On-LAN...............................................................................................................................40

8.11.3. Pulse Low Wake-On-LAN................................................................................................................................41

8.11.4. Wake-On-LAN Pin Types (MII Mode) .............................................................................................................42

8.11.5. Wake-On-LAN Pin Types (RMII Mode)...........................................................................................................42

8.12. ENERGY EFFICIENT ETHERNET (EEE)........................................................................................................................43

8.13. SPREAD SPECTRUM CLOCK (SSC) .............................................................................................................................43

9. CHARACTERISTICS......................................................................................................................................................44

9.1. DC CHARACTERISTICS...............................................................................................................................................44

9.1.1. Absolute Maximum Ratings..................................................................................................................................44

9.1.2. Recommended Operating Conditions...................................................................................................................44

9.1.3. Power On and PHY Reset Sequence.....................................................................................................................45

9.1.4. RMII Input Mode Power Dissipation ...................................................................................................................46

9.1.5. Input Voltage: Vcc................................................................................................................................................46

9.2. AC CHARACTERISTICS...............................................................................................................................................47

9.2.1. MII Transmission Cycle Timing ...........................................................................................................................47

9.2.2. MII Reception Cycle Timing.................................................................................................................................48

9.2.3. RMII Transmission and Reception Cycle Timing .................................................................................................49

9.2.4. MDC/MDIO Timing .............................................................................................................................................51

9.2.5. Transmission without Collision ............................................................................................................................52

9.2.6. Reception without Error .......................................................................................................................................52

9.3. CRYSTAL CHARACTERISTICS .....................................................................................................................................53

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