(DEVICE FILE: CORE_RK3399_10_AS0B821-S78B-314PIN-3588_ASOB826-S78B-7H)
PACKAGE 'AS0B821-S78B-314PIN-3588'
CLASS IC
PINCOUNT 322
PINORDER 'CORE_RK3399_10_AS0B821-S78B-314',
BT1120_D11/PCIE30X4_WAKEN_M1/HDMI_RX_CEC_M0/SATA1_ACT_LED_M0/DDRPHY_CH3_DTB1/UART9_RX_M1/PWM12_M1/SPI3_MISO_M1/GPIO4_B5,
BT1120_D12/PCIE30X4_PERSTN_M1/HDMI_RX_HPDOUT_M0/SATA0_ACT_LED_M0/DDRPHY_CH3_DTB2/I2C5_SCL_M1/PWM13_M1/SPI3_MOSI_M1/GPIO4_B6,
BT1120_D13/PCIE30X1_2_CLKREQN_M1/HDMI_TX0_SCL_M0/DDRPHY_CH3_DTB3/I2C5_SDA_M1/SPI3_CLK_M1/GPIO4_B7,
BT1120_D14/PCIE30X1_2_WAKEN_M1/HDMI_TX0_SDA_M0/I2C8_SCL_M3/SPI3_CS0_M1/GPIO4_C0,
BT1120_D15/SPDIF1_TX_M2/PCIE30X1_2_PERSTN_M1/HDMI_TX0_CEC_M0/I2C8_SDA_M3/PWM6_M1/SPI3_CS1_M1/GPIO4_C1,
CIF_CLKIN/BT1120_CLKOUT/I2S1_SDI3_M0/PCIE30X2_PERSTN_M1/DDRPHY_CH2_DTB0/I2C6_SDA_M3/UART8_TX_M0/SPI2_CS1_M1/GPIO4_B0,
CIF_CLKOUT/BT1120_D10/I2S1_SDO3_M0/PCIE30X4_CLKREQN_M1/DP0_HPDIN_M0/SPDIF0_TX_M1/DDRPHY_CH3_DTB0/UART9_TX_M1/PWM11_IR_M1/GPIO4_B4,
CIF_D0/BT1120_D0/I2S1_MCLK_M0/PCIE30X1_1_CLKREQN_M1/DDRPHY_CH0_DTB0/UART9_RTSN_M1/SPI0_MISO_M1/GPIO4_A0,
CIF_D1/BT1120_D1/I2S1_SCLK_M0/PCIE30X1_1_WAKEN_M1/DDRPHY_CH0_DTB_1/UART9_CTSN_M1/SPI0_MOSI_M1/GPIO4_A1,
CIF_D10/PCIE30X4_PERSTN_M2/HDMI_TX1_SCL_M1/SPI3_MISO_M3/GPIO3_C6,
CIF_D11/PCIE30X1_2_CLKREQN_M0/HDMI_TX0_SCL_M2/I2C5_SCL_M0/SPI3_MOSI_M3/GPIO3_C7,
CIF_D12/PCIE30X1_2_WAKEN_M0/HDMI_TX0_SDA_M2/I2C5_SDA_M0/UART4_RX_M1/PWM8_M2/SPI3_CLK_M3/GPIO3_D0,
CIF_D13/PCIE30X1_2_PERSTN_M0/HDMI_RX_CEC_M1/UART4_TX_M1/PWM9_M2/SPI0_MISO_M3/GPIO3_D1,
CIF_D14/PCIE30X2_CLKREQN_M2/HDMI_RX_SCL_M1/I2C7_SCL_M2/UART9_RTSN_M2/SPI0_MOSI_M3/GPIO3_D2,
CIF_D15/PCIE30X2_WAKEN_M2/HDMI_RX_SDA_M1/I2C7_SDA_M2/UART9_CTSN_M2/PWM10_M2/SPI0_CLK_M3/GPIO3_D3,
CIF_D2/BT1120_D2/I2S1_LRCK_M0/PCIE30X1_1_PERSTN_M1/DDRPHY_CH0_DTB2/SPI0_CLK_M1/GPIO4_A2,
CIF_D3/BT1120_D3/PCIE30X1_0_CLKREQN_M1/DDRPHY_CH0_DTB_3/UART0_TX_M2/GPIO4_A3,
CIF_D4/BT1120_D4/PCIE30X1_0_WAKEN_M1/DDRPHY_CH1_DTB_0/I2C3_SCL_M2/UART0_RX_M2/SPI2_MISO_M1/GPIO4_A4,
CIF_D5/BT1120_D5/I2S1_SDI0_M0/PCIE30X1_0_PERSTN_M1/DDRPHY_CH1_DTB_1/I2C3_SDA_M2/UART3_TX_M2/SPI2_MOSI_M1/GPIO4_A5,
CIF_D6/BT1120_D6/I2S1_SDI1_M0/PCIE30X2_CLKREQN_M1/DDRPHY_CH1_DTB2/I2C5_SCL_M2/UART3_RX_M2/SPI2_CLK_M1/GPIO4_A6,
CIF_D7/BT1120_D7/I2S1_SDI2_M0/PCIE30X2_WAKEN_M1/DDRPHY_CH1_DTB3/I2C5_SDA_M2/SPI2_CS0_M1/GPIO4_A7,
CIF_D8/FSPI_CS0N_M2/PCIE30X4_CLKREQN_M2/HDMI_TX1_CEC_M2/CAN2_RX_M0/UART5_TX_M1/SPI3_CS0_M3/GPIO3_C4,
CIF_D9/FSPI_CS1N_M2/PCIE30X4_WAKEN_M2/HDMI_TX1_SDA_M1/CAN2_TX_M0/UART5_RX_M1/SPI3_CS1_M3/GPIO3_C5,
CIF_HREF/BT1120_D8/I2S1_SDO1_M0/PCIE30X1_1_BUTTON_RSTN/DDRPHY_CH2_DTB2/I2C7_SCL_M3/UART8_RTSN_M0/PWM14_M1/SPI0_CS0_M1/CAN1_RX_M1/GPIO4_B2,
CIF_VSYNC/BT1120_D9/I2S1_SDO2_M0/PCIE30X1_2_BUTTON_RSTN/DDRPHY_CH2_DTB3/I2C7_SDA_M3/UART8_CTSN_M0/PWM15_IR_M1/CAN1_TX_M1/GPIO4_B3,
CLK32K_IN/CLK32K_OUT0/GPIO0_B2 CLK32K_OUT1/GPIO2_C5,
ETH0_REFCLKO_25M/I2S2_SDI_M0/I2C6_SCL_M2/SPI1_CS0_M0/GPIO2_C3,
ETH1_REFCLKO_25M/MIPI_CAMERA1_CLK_M1/I2C4_SCL_M0/GPIO3_A6,
GMAC0_MCLKINOUT/I2S2_SDO_M0/I2C7_SCL_M1/PWM4_M1/SPI3_CS1_M0/GPIO4_C3,
GMAC0_MDC/I2C7_SDA_M1/UART9_RTSN_M0/PWM5_M2/SPI3_MISO_M0/GPIO4_C4,
GMAC0_MDIO/I2C0_SCL_M1/UART9_CTSN_M0/PWM6_M2/SPI3_MOSI_M0/GPIO4_C5,
GMAC0_PPSCLK/TEST_CLKOUT_M1/HDMI_TX1_CEC_M0/UART9_RX_M0/SPI1_CS1_M0/GPIO2_C4,
GMAC0_PPSTRING/FSPI_CS1N_M1/HDMI_TX1_SCL_M0/I2C4_SCL_M1/UART7_TX_M0/GPIO2_B5,
GMAC0_PTP_REFCLK/FSPI_CS0N_M1/HDMI_TX1_SDA_M0/I2C4_SDA_M1/UART7_RX_M0/GPIO2_B4,
GMAC0_RXCLK/SDIO_D2_M0/FSPI_D2_M1/I2C8_SCL_M1/UART6_RTSN_M0/GPIO2_B0,
GMAC0_RXD0/I2C2_SCL_M1/UART1_CTSN_M0/SPI1_MISO_M0/GPIO2_C1,
GMAC0_RXD1/I2C6_SDA_M2/UART9_TX_M0/SPI1_MOSI_M0/GPIO2_C2,
GMAC0_RXD2/SDIO_D0_M0/FSPI_D0_M1/UART6_RX_M0/GPIO2_A6,
GMAC0_RXD3/SDIO_D1_M0/FSPI_D1_M1/UART6_TX_M0/GPIO2_A7,
GMAC0_RXDV_CRS/UART7_RTSN_M0/PWM2_M2/SPI3_CS0_M0/GPIO4_C2,
GMAC0_TXCLK/SDIO_CLK_M0/FSPI_CLK_M1/I2C3_SDA_M3/GPIO2_B3,
GMAC0_TXD0/I2S2_MCLK_M0/I2C5_SCL_M4/UART1_RX_M0/GPIO2_B6,
GMAC0_TXD1/I2S2_SCLK_M0/I2C5_SDA_M4/UART1_TX_M0/GPIO2_B7,
GMAC0_TXD2/SDIO_D3_M0/FSPI_D3_M1/I2C8_SDA_M1/UART6_CTSN_M0/GPIO2_B1,
GMAC0_TXD3/SDIO_CMD_M0/I2C3_SCL_M3/GPIO2_B2,
GMAC0_TXEN/I2S2_LRCLK_M0/I2C2_SDA_M1/UART1_RTSN_M0/SPI1_CLK_M0/GPIO2_C0,
GMAC0_TXER/I2C0_SDA_M1/UART7_CTSN_M0/PWM7_IR_M3/SPI3_CLK_M0/GPIO4_C6,
GMAC1_MCLKINOUT/I2S2_LRCK_M1/CAN1_TX_M0/UART3_RX_M1/PWM13_M0/GPIO3_B6,
GMAC1_MDC/MIPI_TE0/I2C8_SCL_M4/UART7_RTSN_M1/PWM14_M0/SPI1_CS0_M1/GPIO3_C2,
GMAC1_MDIO/MIPI_TE1/I2C8_SDA_M4/UART7_CTSN_M1/PWM15_IR_M0/SPI1_CS1_M1/GPIO3_C3,
GMAC1_PPSCLK/PCIE30X2_BUTTON_RSTN/UART7_RX_M1/SPI1_CLK_M1/GPIO3_C1,
GMAC1_PPSTRIG/I2C3_SDA_M1/UART7_TX_M1/SPI1_MISO_M1/GPIO3_C0,
GMAC1_PTP_REF_CLK/HDMI_TX1_HPD_M1/I2C3_SCL_M1/SPI1_MOSI_M1/GPIO3_B7,
GMAC1_RXCLK/SDIO_CLK_M1/MIPI_CAMERA0_CLK_M1/FSPI_CLK_M2/I2C4_SDA_M0/UART8_CTSN_M1/GPIO3_A5,
GMAC1_RXD0/MIPI_CAMERA2_CLK_M1/PWM8_M0/GPIO3_A7,
GMAC1_RXD1/MIPI_CAMERA3_CLK_M1/PWM9_M0/GPIO3_B0,
GMAC1_RXD2/SDIO_D2_M1/I2S3_LRCK/AUDDSM_LP/FSPI_D2_M2/UART8_TX_M1/SPI4_CLK_M1/GPIO3_A2,
GMAC1_RXD3/SDIO_D3_M1/I2S3_SDO/AUDDSM_RN/FSPI_D3_M2/UART8_RX_M1/SPI4_CS0_M1/GPIO3_A3,
GMAC1_RXDV_CRS/MIPI_CAMERA4_CLK_M1/UART2_TX_M2/PWM2_M1/GPIO3_B1,
GMAC1_TXCLK/SDIO_CMD_M1/I2S3_SDI/AUDDSM_RP/UART8_RTSN_M1/SPI4_CS1_M1/GPIO3_A4_D,
GMAC1_TXD0/I2S2_SDO_M1/UART2_RTSN/GPIO3_B3 GMAC1_TXD1/I2S2_MCLK_M1/UART2_CTSN/GPIO3_B4,
GMAC1_TXD2/SDIO_D0_M1/I2S3_MCLK/FSPI_D0_M2/I2C6_SDA_M4/PWM10_M0/SPI4_MISO_M1/GPIO3_A0,
GMAC1_TXD3/SDIO_D1_M1/I2S3_SCLK/AUDDSM_LN/FSPI_D2_M2/I2C6_SCL_M4/PWM11_IR_M0/SPI4_MOSI_M1/GPIO3_A1,
GMAC1_TXEN/I2S2_SCLK_M1/CAN1_RX_M0/UART3_TX_M1/PWM12_M0/GPIO3_B5,
GMAC1_TXER/I2S2_SDI_M1/UART2_RX_M2/PWM3_IR_M1/GPIO3_B2 GND1 GND10 GND11 GND12 GND13 GND14,
GND15 GND16 GND17 GND18 GND19 GND2 GND20 GND3 GND4 GND5 GND59 GND6 GND60 GND61 GND62 GND63,
GND64 GND7 GND8 GND9 GND_1 GND_10 GND_2 GND_3 GND_4 GND_5 GND_6 GND_7 GND_8 GND_9 HDMI_RX_CLKN,
HDMI_RX_CLKP HDMI_RX_D0N HDMI_RX_D0P HDMI_RX_D1N HDMI_RX_D1P HDMI_RX_D2N HDMI_RX_D2P,
HDMI_TX0_D0N/EDP_TX0_D0N HDMI_TX0_D0P/EDP_TX0_D0P HDMI_TX0_D1N/EDP_TX0_D1N,
HDMI_TX0_D1P/EDP_TX0_D1P HDMI_TX0_D2N/EDP_TX0_D2N HDMI_TX0_D2P/EDP_TX0_D2P,
HDMI_TX0_D3N/EDP_TX0_D3N HDMI_TX0_D3P/EDP_TX0_D3P HDMI_TX0_HPD_M0/SPI2_MOSI_M0/GPIO1_A5,
HDMI_TX0_HPD_M1/PCIE30X2_PERSTN_M2/HDMI_RX_HPOUT_M1/MCU_JTAG_TCK_M1/UART9_RX_M2/SPI0_CS0_M3/GPIO3_D4,
HDMI_TX0_SBDN/EDP_TX0_AUXN HDMI_TX0_SBDP/EDP_TX0_AUXP HDMI_TX1_D0N/EDP_TX1_D0N,
HDMI_TX1_D0P/EDP_TX1_D0P HDMI_TX1_D1N/EDP_TX1_D1N HDMI_TX1_D1P/EDP_TX1_D1P,
HDMI_TX1_D2N/EDP_TX1_D2N HDMI_TX1_D2P/EDP_TX1_D2P HDMI_TX1_D3N/EDP_TX1_D3N,
HDMI_TX1_D3P/EDP_TX1_D3P HDMI_TX1_HPD_M0/SPI2_CLK_M0/GPIO1_A6 HDMI_TX1_SBDN/EDP_TX1_AUXN,
HDMI_TX1_SBDP/EDP_TX1_AUXP HDMI_TX1_SCL_M2/SPI2_MISO_M0/GPIO1_A4,
HDMI_TX1_SDA_M2/I2C4_SCL_M3/UART6_CTSN_M1/PWM1_M2/SPI4_CS0_M2/GPIO1_A3,
I2C3_SCL_M0/UART3_TX_M0/SPI4_MOSI_M0/GPIO1_C1 I2C3_SCL_M0/UART3_TX_M0/SPI4_MOSI_M0/GPIO1_C1_Z,
I2S0_LRCK/I2C2_SCL_M3/UART4_RTSN/GPIO1_C5,
I2S0_MCLK/I2C6_SDA_M1/UART3_RTSN/PWM3_IR_M2/SPI4_CLK_M0/GPIO1_C2,
I2S0_SCLK/I2C6_SCL_M1/UART3_CTSN/PWM7_IR_M2/SPI4_CS0_M0/GPIO1_C3 I2S0_SDI0/GPIO1_D4,
I2S0_SDI1/PDM0_SDI3_M0/I2C1_SDA_M4/UART4_RX_M0/PWM1_M1/SPI1_CS0_M2/GPIO1_D3_D,
I2S0_SDO0/I2C4_SCL_M4/UART4_CTSN/GPIO1_C7,
I2S0_SDO1/I2C7_SCL_M0/UART6_TX_M2/SPI1_MISO_M2/GPIO1_D0,
I2S0_SDO2/I2S0_SDI3/PDM0_SDI1_M0/I2C7_SDA_M0/UART6_RX_M2/SPI1_MOSI_M2/GPIO1_D1_D,
I2S0_SDO3/I2S0_SDI2/PDM0_SDI2_M0/I2C1_SCL_M4/UART4_TX_M0/PWM0_M1/SPI1_CLK_M2/GPIO1_D2_D,
I2S1_LRCK_M1/PWM0_M0/I2C2_SCL_M0/CAN0_TX_M0/SPI0_CS1_M0/PCIE30X1_1_PERSTN_M0/GPIO0_B7,
I2S1_MCLK_M1/JTAG_TCK_M2/I2C1_SCL_M0/UART2_TX_M0/PCIE
allegro焊盘库，封装库，规格全部按照嘉立创规格书设计规范
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2023-07-11
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allegro焊盘库，封装库，规格全部按照嘉立创规格书设计规范 （5326个子文件） 
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