ADUM2402ARWZ-RLADI芯片电子元器件中文版规格手册.pdf

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隔离器在电子设计中起着至关重要的作用，用于在不同电势或地电位之间传输数字信号，同时防止电流流动并保护系统免受过电压的影响。ADI公司的ADuM2402ARWZ-RL是一款四通道数字隔离器，采用先进的iCoupler技术，提供高效、低功耗的解决方案，适用于多种应用，包括医疗设备、电机驱动和电源供应等。该芯片的主要特点包括低功耗操作，能够在5V和3V电源条件下工作。在0Mbps到2Mbps的数据速率下，每个通道的最大电流消耗仅为1.0mA（5V）和0.7mA（3V）。随着数据速率增加到10Mbps，电流消耗分别上升至3.5mA（5V）和2.1mA（3V），而在最高90Mbps的数据速率下，电流消耗分别达到31mA（5V）和20mA（3V）。这种设计使得ADuM2402ARWZ-RL在高速通信时仍能保持较低的功耗。 ADuM2402ARWZ-RL支持双向通信，可实现3V/5V电平转换，确保与不同电压系统的兼容性。此外，它具有出色的高共模瞬态抗扰度，超过25kV/μs，这使得该隔离器能够抵抗高电压瞬变，提高系统稳定性。精确的定时特性包括最大2ns的脉宽失真和通道间匹配，确保了数据传输的准确性和可靠性。该器件的工作温度范围广泛，最高可达105°C，满足高温环境下的应用需求。高数据率能力从直流到90Mbps（非归零编码NRZ），适应各种高速通信需求。输出使能功能允许用户控制信号的传输，增加了设计的灵活性。封装方面，ADuM2402ARWZ-RL提供16引脚SOIC宽体封装版本（RW-16）和增强爬电距离版本（RI-16）。其中，RI-16封装已通过多项安全和监管批准，包括UL认证（5000Vrms，1分钟，符合UL 1577标准）、CSA Component Acceptance Notice 5A、IEC 60601-1：250Vrms（加强型）和IEC 60950-1：400Vrms（加强型），以及VDE证书，符合DIN V VDE V 0884-10:2006-12标准，VIORM为846V峰值，确保了在实际应用中的安全性。 ADuM2402ARWZ-RL是一款高性能的四通道数字隔离器，具备低功耗、高速、高共模瞬态抗扰度和多种安全认证的特点，适合在需要高电压隔离和可靠数据传输的场合使用。它的广泛应用和出色的性能指标使其成为电子设计者在构建复杂系统时的首选组件。

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Quad-Channel Digital Isolators

Data Sheet

ADuM2400/ADuM2401/ADuM2402

Rev. F

Document Feedbac

Information furnished by Analog Devices is believed to be accurate and reliable. However, no

responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other

rights of third parties that may result from its use. Specifications subject to change without notice. No

license is granted by implication or otherwise under any patent or patent rights of Analog Devices.

Trademarks and registered trademarks are the property of their respective owners.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Technical Suppor t www.analog.com

FEATURES

Low power operation

5 V operation

1.0 mA per channel maximum @ 0 Mbps to 2 Mbps

3.5 mA per channel maximum @ 10 Mbps

31 mA per channel maximum @ 90 Mbps

3 V operation

0.7 mA per channel maximum @ 0 Mbps to 2 Mbps

2.1 mA per channel maximum @ 10 Mbps

20 mA per channel maximum @ 90 Mbps

Bidirectional communication

3 V/5 V level translation

High temperature operation: 105°C

High data rate: dc to 90 Mbps (NRZ)

Precise timing characteristics

2 ns maximum pulse width distortion

2 ns maximum channel-to-channel matching

High common-mode transient immunity: >25 kV/μs

Output enable function

16-lead SOIC wide body package version (RW-16)

16-lead SOIC wide body enhanced creepage version (RI-16)

Safety and regulatory approvals (RI-16 package)

recognition: 5000 V rms for 1 minute per UL 1577

CSA Component Acceptance Notice 5A

IEC 60601-1: 250 V rms (reinforced)

IEC 60950-1: 400 V rms (reinforced)

VDE Certificate of Conformity

DIN V VDE V 0884-10 (VDE V 0884-10):2006-12

IORM

= 846 V peak

APPLICATIONS

General-purpose, high voltage, multichannel isolation

Medical equipment

Motor drives

Power supplies

GENERAL DESCRIPTION

The ADuM2400/ADuM2401/ADuM2402

are 4-channel digital

isolators based on Analog Devices, Inc., iCoupler® technology.

Combining high speed CMOS and monolithic air core transformer

technology, these isolation components provide outstanding

performance characteristics that are superior to alternatives, such

as optocoupler devices.

By avoiding the use of LEDs and photodiodes, iCoupler devices

remove the design difficulties commonly associated with opto-

couplers. The typical optocoupler concerns regarding uncertain

current transfer ratios, nonlinear transfer functions, and tempera

Protected by U.S. Patents 5,952,849; 6,873,065; and 7,075,329.

FUNCTIONAL BLOCK DIAGRAMS

ENCODE DECODE

DD1

GND

DD2

GND

05007-001

ADuM2400

Figure 1. ADuM24

DECODE ENCODE

ENCODE DECODE

DD1

GND

DD2

GND

05007-002

ADuM2401

Figure 2. ADuM24

DECODE ENCODE

ENCODE DECODE

DD1

GND

DD2

GND

05007-003

ADuM2402

Figure 3. ADuM24

ture and lifetime effects are eliminated with the simple iCoupler

digital interfaces and stable performance characteristics. Further-

more, iCoupler devices run at one-tenth to one-sixth the power

of optocouplers at comparable signal data rates.

The ADuM2400/ADuM2401/ADuM2402 isolators provide four

independent isolation channels in a variety of channel configura-

tions and data rates (see the Ordering Guide). The ADuM2400/

ADuM2401/ADuM2402 models operate with the supply voltage

of either side ranging from 2.7 V to 5.5 V, providing compatibil-

ity with lower voltage systems as well as enabling a voltage

translation functionality across the isolation barrier. In addition,

the ADuM2400/ADuM2401/ADuM2402 provide low pulse

width distortion (<2 ns for CRWZ grade) and tight channel-to-

channel matching (<2 ns for CRWZ grade). The ADuM2400/

ADuM2401/ADuM2402 isolators have a patented refresh feature

that ensures dc correctness in the absence of input logic transitions

and during power-up/power-down conditions.

ADuM2400/ADuM2401/ADuM2402 Data Sheet

Rev. F | Page 2 of 24

TABLE OF CONTENTS

Features .............................................................................................. 1

Applications ....................................................................................... 1

General Description ......................................................................... 1

Functional Block Diagrams ............................................................. 1

Revision History ............................................................................... 2

Specifications ..................................................................................... 3

Electrical Characteristics—5 V Operation................................ 3

Electrical Characteristics—3 V Operation................................ 5

Electrical Characteristics—Mixed 5 V/3 V or 3 V/5 V

Operation ....................................................................................... 7

Package Characteristics ............................................................. 10

Regulatory Information ............................................................. 10

Insulation and Safety-Related Specifications .......................... 10

DIN V VDE V 0884-10 (VDE V 0884-10) Insulation

Characteristics ............................................................................ 11

Recommended Operating Conditions .................................... 11

Absolute Maximum Ratings ......................................................... 12

ESD Caution................................................................................ 12

Pin Configurations and Function Descriptions ......................... 13

Typical Performance Characteristics ........................................... 16

Application Information ................................................................ 18

PC Board Layout ........................................................................ 18

Propagation Delay-Related Parameters ................................... 18

DC Correctness and Magnetic Field Immunity.......................... 18

Power Consumption .................................................................. 19

Insulation Lifetime ..................................................................... 20

Outline Dimensions ....................................................................... 21

Ordering Guide .......................................................................... 22

REVISION HISTORY

7/15—Rev. E to Rev. F

Changes to Table 5 and Table 6 ..................................................... 10

Updated Outline Dimensions ....................................................... 21

Changes to Ordering Guide .......................................................... 22

2/12—Rev. D to Rev. E

Created Hyperlink for Safety and Regulatory Approvals

Entry in Features Section ................................................................. 1

Change to PC Board Layout Section ............................................ 18

8/11—Rev. C to Rev. D

Added 16-Lead SOIC_IC .................................................. Universal

Changes to Features Section and General Description

Section ................................................................................................ 1

Changes to Table 5 and Table 6 ..................................................... 10

Changes to Table 8 Endnote .......................................................... 11

Updated Outline Dimensions ....................................................... 21

Changes to Ordering Guide .......................................................... 21

7/08—Rev. B to Rev. C

Changes to Layout ............................................................................ 1

Changes to Table 6 .......................................................................... 10

6/07—Rev. A to Rev. B

Updated VDE Certification Throughout ....................................... 1

Changes to Features and Note 1 ...................................................... 1

Changes to Figure 1, Figure 2, and Figure 3 .................................. 1

Changes to Regulatory Information ............................................ 10

Changes to Table 7 .......................................................................... 11

Changes to Insulation Lifetime Section ...................................... 20

Updated Outline Dimensions ....................................................... 21

Changes to Ordering Guide .......................................................... 21

1/06—Rev. 0 to Rev. A

Changes to Regulatory Information Section .............................. 13

Updated Outline Dimensions ....................................................... 23

Changes to Ordering Guide .......................................................... 23

9/05—Revision 0: Initial Version

Data Sheet ADuM2400/ADuM2401/ADuM2402

Rev. F | Page 3 of 24

SPECIFICATIONS

ELECTRICAL CHARACTERISTICS—5 V OPERATION

4.5 V ≤ V

DD1

≤ 5.5 V, 4.5 V ≤ V

DD2

≤ 5.5 V. All minimum/maximum specifications apply over the entire recommended operation range,

unless otherwise noted. All typical specifications are at T

= 25°C, V

DD1

= V

DD2

= 5 V.

Table 1.

Parameter Symbol Min Typ Max Unit Test Conditions

DC SPECIFICATIONS

Input Supply Current per Channel, Quiescent I

DDI (Q)

0.50 0.53 mA

Output Supply Current per Channel, Quiescent I

DDO (Q)

0.19 0.21 mA

ADuM2400 Total Supply Current, Four Channels

DC to 2 Mbps

DD1

Supply Current I

DD1 (Q)

2.2 2.8 mA DC to 1 MHz logic signal frequency

DD2

Supply Current I

DD2 (Q)

0.9 1.4 mA DC to 1 MHz logic signal frequency

10 Mbps (BRWZ and CRWZ Grades Only)

DD1

Supply Current

DD1 (10)

8.6

10.6

5 MHz logic signal frequency

DD2

Supply Current I

DD2 (10)

2.6 3.5 mA 5 MHz logic signal frequency

90 Mbps (CRWZ Grade Only)

DD1

Supply Current I

DD1 (90)

70 100 mA 45 MHz logic signal frequency

DD2

Supply Current I

DD2 (90)

18 25 mA 45 MHz logic signal frequency

ADuM2401 Total Supply Current, Four Channels

DC to 2 Mbps

DD1

Supply Current I

DD1 (Q)

1.8 2.4 mA DC to 1 MHz logic signal frequency

DD2

Supply Current I

DD2 (Q)

1.2 1.8 mA DC to 1 MHz logic signal frequency

10 Mbps (BRWZ and CRWZ Grades Only)

DD1

Supply Current I

DD1 (10)

7.1 9.0 mA 5 MHz logic signal frequency

DD2

Supply Current I

DD2 (10)

4.1 5.0 mA 5 MHz logic signal frequency

90 Mbps (CRWZ Grade Only)

DD1

Supply Current I

DD1 (90)

57 82 mA 45 MHz logic signal frequency

DD2

Supply Current I

DD2 (90)

31 43 mA 45 MHz logic signal frequency

ADuM2402 Total Supply Current, Four Channels

DC to 2 Mbps

DD1

or V

DD2

Supply Current I

DD1 (Q)

, I

DD2 (Q)

1.5 2.1 mA DC to 1 MHz logic signal frequency

10 Mbps (BRWZ and CRWZ Grades Only)

DD1

or V

DD2

Supply Current I

DD1 (10)

, I

DD2 (10)

5.6 7.0 mA 5 MHz logic signal frequency

90 Mbps (CRWZ Grade Only)

DD1

or V

DD2

Supply Current I

DD1 (90)

, I

DD2 (90)

44 62 mA 45 MHz logic signal frequency

For All Models

Input Currents I

, I

−10 +0.01 +10 µA 0 V ≤ V

, V

≤ V

DD1

or V

DD2

0 V ≤ V

, V

≤ V

DD1

or V

DD2

Logic High Input Threshold

, V

2.0 V

Logic Low Input Threshold

, V

0.8 V

Logic High Output Voltages V

OAH

, V

OBH

OCH

, V

ODH

DD1

or V

DD2

) − 0.1 5.0 V I

= −20 µA, V

= V

IxH

DD1

or V

DD2

) − 0.4 4.8 V I

= −4 mA, V

= V

IxH

Logic Low Output Voltages V

OAL

, V

OBL

OCL

, V

ODL

0.0 0.1 V I

= 20 µA, V

= V

IxL

0.04

0.1

= 400 µA, V

= V

IxL

0.2 0.4 V I

= 4 mA, V

= V

IxL

SWITCHING SPECIFICATIONS

ADuM2400ARWZ/ADuM2401ARWZ/

ADuM2402ARWZ

Minimum Pulse Width

PW 1000 ns C

= 15 pF, CMOS signal levels

Maximum Data Rate

1 Mbps C

= 15 pF, CMOS signal levels

Propagation Delay

PHL

, t

PLH

50 65 100 ns C

= 15 pF, CMOS signal levels

Pulse Width Distortion, |t

PLH

− t

PHL

PWD 40 ns C

= 15 pF, CMOS signal levels

Propagation Delay Skew

PSK

50 ns C

= 15 pF, CMOS signal levels

Channel-to-Channel Matching

PSKCD/

PSKOD

= 15 pF, CMOS signal levels

ADuM2400/ADuM2401/ADuM2402 Data Sheet

Rev. F | Page 4 of 24

Parameter Symbol Min Typ Max Unit Test Conditions

ADuM2400BRWZ/ADuM2401BRWZ/

ADuM2402BRWZ

Minimum Pulse Width

PW 100 ns C

= 15 pF, CMOS signal levels

Maximum Data Rate

10 Mbps C

= 15 pF, CMOS signal levels

Propagation Delay

PHL

, t

PLH

20 32 50 ns C

= 15 pF, CMOS signal levels

Pulse Width Distortion, |t

PLH

− t

PHL

PWD 3 ns C

= 15 pF, CMOS signal levels

Change vs. Temperature 5 ps/°C C

= 15 pF, CMOS signal levels

Propagation Delay Skew

PSK

= 15 pF, CMOS signal levels

Channel-to-Channel Matching,

Codirectional Channels

PSKCD

3 ns C

= 15 pF, CMOS signal levels

Channel-to-Channel Matching,

Opposing-Directional Channels

PSKOD

6 ns C

= 15 pF, CMOS signal levels

ADuM2400CRWZ/ADuM2401CRWZ/

ADuM2402CRWZ

Minimum Pulse Width

PW 8.3 11.1 ns C

= 15 pF, CMOS signal levels

Maximum Data Rate

90 120 Mbps C

= 15 pF, CMOS signal levels

Propagation Delay

PHL

, t

PLH

18 27 32 ns C

= 15 pF, CMOS signal levels

Pulse Width Distortion, |t

PLH

− t

PHL

PWD 0.5 2 ns C

= 15 pF, CMOS signal levels

Change vs. Temperature 3 ps/°C C

= 15 pF, CMOS signal levels

Propagation Delay Skew

PSK

10 ns C

= 15 pF, CMOS signal levels

Channel-to-Channel Matching,

Codirectional Channels

PSKCD

2 ns C

= 15 pF, CMOS signal levels

Channel-to-Channel Matching,

Opposing-Directional Channels

PSKOD

5 ns C

= 15 pF, CMOS signal levels

For All Models

Output Disable Propagation Delay

(High/Low to High Impedance)

PHZ

, t

PLH

6 8 ns C

= 15 pF, CMOS signal levels

Output Enable Propagation Delay

(High Impedance to High/Low)

PZH

, t

PZL

6 8 ns C

= 15 pF, CMOS signal levels

Output Rise/Fall Time (10% to 90%) t

2.5 ns C

= 15 pF, CMOS signal levels

Common-Mode Transient Immunity at

Logic High Output

|CM

| 25 35 kV/µs V

= V

DD1

or V

DD2

, V

= 1000 V,

transient magnitude = 800 V

Common-Mode Transient Immunity at

Logic Low Output

|CM

| 25 35 kV/µs V

= 0 V, V

= 1000 V,

transient magnitude = 800 V

Refresh Rate f

1.2 Mbps

Input Dynamic Supply Current per Channel

DDI (D)

0.19 mA/Mbps

Output Dynamic Supply Current per Channel

DDO (D)

0.05 mA/Mbps

All voltages are relative to their respective ground.

Supply current values are for all four channels combined running at identical data rates. Output supply current values are specified with no output load present. The

supply current associated with an individual channel operating at a given data rate can be calculated as described in the Power Consumption section. See Figure 8

through Figure 10 for information on per channel supply current as a function of data rate for unloaded and loaded conditions. See Figure 11 through Figure 15 for

total V

DD1

and V

DD2

supply currents as a function of data rate for ADuM2400/ADuM2401/ADuM2402 channel configurations.

The minimum pulse width is the shortest pulse width at which the specified pulse width distortion is guaranteed.

The maximum data rate is the fastest data rate at which the specified pulse width distortion is guaranteed.

PHL

propagation delay is measured from the 50% level of the falling edge of the V

signal to the 50% level of the falling edge of the V

signal. t

PLH

propagation delay is

measured from the 50% level of the rising edge of the V

signal to the 50% level of the rising edge of the V

signal.

PSK

is the magnitude of the worst-case difference in t

PHL

or t

PLH

that is measured between units at the same operating temperature, supply voltages, and output load

within the recommended operating conditions.

Codirectional channel-to-channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on the same side of

the isolation barrier. Opposing directional channel-to-channel matching is the absolute value of the difference in propagation delays between any two channels with

inputs on opposing sides of the isolation barrier.

is the maximum common-mode voltage slew rate that can be sustained while maintaining V

> 0.8 V

DD2

. CM

is the maximum common-mode voltage slew rate

that can be sustained while maintaining V

< 0.8 V. The common-mode voltage slew rates apply to both rising and falling common-mode voltage edges. The transient

magnitude is the range over which the common mode is slewed.

Dynamic supply current is the incremental amount of supply current required for a 1 Mbps increase in signal data rate. See Figure 8 through Figure 10 for information

on per channel supply current for unloaded and loaded conditions. See the Power Consumption section for guidance on calculating per channel supply current for a

given data rate.

Data Sheet ADuM2400/ADuM2401/ADuM2402

Rev. F | Page 5 of 24

ELECTRICAL CHARACTERISTICS—3 V OPERATION

2.7 V ≤ V

DD1

≤ 3.6 V, 2.7 V ≤ V

DD2

≤ 3.6 V. All minimum/maximum specifications apply over the entire recommended operation range,

unless otherwise noted. All typical specifications are at T

= 25°C, V

DD1

= V

DD2

= 3.0 V.

Table 2.

Parameter Symbol Min Typ Max Unit Test Conditions

DC SPECIFICATIONS

Input Supply Current per Channel, Quiescent I

DDI (Q)

0.26 0.31 mA

Output Supply Current per Channel, Quiescent I

DDO (Q)

0.11 0.14 mA

ADuM2400 Total Supply Current, Four Channels

DC to 2 Mbps

DD1

Supply Current I

DD1 (Q)

1.2 1.9 mA DC to 1 MHz logic signal frequency

DD2

Supply Current I

DD2 (Q)

0.5 0.9 mA DC to 1 MHz logic signal frequency

10 Mbps (BRWZ and CRWZ Grades Only)

DD1

Supply Current I

DD1 (10)

4.5 6.5 mA 5 MHz logic signal frequency

DD2

Supply Current I

DD2 (10)

1.4 2.0 mA 5 MHz logic signal frequency

90 Mbps (CRWZ Grade Only)

DD1

Supply Current I

DD1 (90)

37 65 mA 45 MHz logic signal frequency

DD2

Supply Current

DD2 (90)

45 MHz logic signal frequency

ADuM2401 Total Supply Current, Four Channels

DC to 2 Mbps

DD1

Supply Current I

DD1 (Q)

1.0 1.6 mA DC to 1 MHz logic signal frequency

DD2

Supply Current I

DD2 (Q)

0.7 1.2 mA DC to 1 MHz logic signal frequency

10 Mbps (BRWZ and CRWZ Grades Only)

DD1

Supply Current I

DD1 (10)

3.7 5.4 mA 5 MHz logic signal frequency

DD2

Supply Current I

DD2 (10)

2.2 3.0 mA 5 MHz logic signal frequency

90 Mbps (CRWZ Grade Only)

DD1

Supply Current I

DD1 (90)

30 52 mA 45 MHz logic signal frequency

DD2

Supply Current I

DD2 (90)

18 27 mA 45 MHz logic signal frequency

ADuM2402 Total Supply Current, Four Channels

DC to 2 Mbps

DD1

or V

DD2

Supply Current

DD1 (Q)

, I

DD2 (Q)

0.9

1.5

DC to 1 MHz logic signal frequency

10 Mbps (BRWZ and CRWZ Grades Only)

DD1

or V

DD2

Supply Current I

DD1 (10)

, I

DD2 (10)

3.0 4.2 mA 5 MHz logic signal frequency

90 Mbps (CRWZ Grade Only)

DD1

or V

DD2

Supply Current I

DD1 (90)

, I

DD2 (90)

24 39 mA 45 MHz logic signal frequency

For All Models

Input Currents I

, I

−10 +0.01 +10 µA 0 V ≤ V

, V

≤ V

DD1

or V

DD2

0 V ≤ V

, V

≤ V

DD1

or V

DD2

Logic High Input Threshold

, V

1.6 V

Logic Low Input Threshold

, V

0.4 V

Logic High Output Voltages V

OAH

, V

OBH

OCH

, V

ODH

DD1

or V

DD2

) − 0.1 3.0 V I

= −20 µA, V

= V

IxH

DD1

or V

DD2

) − 0.4 2.8 V I

= −4 mA, V

= V

IxH

Logic Low Output Voltages V

OAL

, V

OBL

OCL

, V

ODL

0.0 0.1 V I

= 20 µA, V

= V

IxL

0.04

0.1

= 400 µA, V

= V

IxL

0.2 0.4 V I

= 4 mA, V

= V

IxL

SWITCHING SPECIFICATIONS

ADuM2400ARWZ/ADuM2401ARWZ/

ADuM2402ARWZ

Minimum Pulse Width

PW 1000 ns C

= 15 pF, CMOS signal levels

Maximum Data Rate

1 Mbps C

= 15 pF, CMOS signal levels

Propagation Delay

PHL

, t

PLH

50 75 100 ns C

= 15 pF, CMOS signal levels

Pulse Width Distortion, |t

PLH

− t

PHL

PWD 40 ns C

= 15 pF, CMOS signal levels

Propagation Delay Skew

PSK

= 15 pF, CMOS signal levels

Channel-to-Channel Matching

PSKCD/

PSKOD

50 ns C

= 15 pF, CMOS signal levels

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2024-04-13

靠，居然说是中文，明明就是英文版的

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