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锁相环(PLL)15e03 pdf资料
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2012-08-28
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无线麦克风 通用锁相环 性能稳定 市场上绝大多数 U段麦克风都使用此PLL
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DS04-21359-4E
FUJITSU SEMICONDUCTOR
DATA SHEET
ASSP
Single Serial Input
PLL Frequency Synthesizer
On-chip 1.2 GHz Prescaler
MB15E03SL
■
DESCRIPTION
The Fujitsu MB15E03SL is a serial input Phase Locked Loop (PLL) frequency synthesizer with a 1.2 GHz prescaler.
The 1.2 GHz prescaler has a dual modulus division ratio of 64/65 or 128/129 enabling pulse swallowing operation.
The supply voltage range is between 2.4 V and 3.6 V. The MB15E03SL uses the latest BiCMOS process, as a result,
the supply current is typically 2.0 mA at 2.7 V. A refined charge pump supplies a well balanced output currents of
1.5 mA or 6 mA. The charge pump current is selectable by serial data.
MB15E03SL is ideally suited for wireless mobile communications, such as GSM.
■
FEATURES
• High frequency operation: 1.2 GHz max
• Low power supply voltage: V
CC = 2.4 V to 3.6 V
• Ultra Low power supply current:I
CC = 2.0 mA typ. (VCC = Vp = 2.7 V, Ta = +25°C, in locking state)
ICC = 2.5 mA typ. (VCC = Vp = 3 V, Ta = +25°C, in locking state)
• Direct power saving function: Power supply current in power saving mode
Typ. 0.1 µA (V
CC = Vp = 3 V, Ta = +25°C), Max. 10 µA (VCC = Vp = 3 V)
• Dual modulus prescaler: 64/65 or 128/129
• Serial input 14-bit programmable reference divider: R = 3 to 16,383
• Serial input programmable divider consisting of:
- Binary 7-bit swallow counter: 0 to 127
- Binary 11-bit programmable counter: 3 to 2,047
• Selectable charge pump current
• On-chip phase control for phase comparator
• Operating temperature: Ta = –40 to +85°C
• Pin compatible with MB15E03, MB15E03L
■
PACKAGES
16-pin plastic SSOP
(FPT-16P-M05)
16-pad plastic BCC
(LCC-16P-M06)
2
MB15E03SL
■
PIN ASSIGNMENTS
OSCIN
OSCOUT
VP
VCC
DO
GND
Xfin
fin
φR
φP
LD/fout
ZC
PS
LE
Data
Clock
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
TOP
VIEW
OSCOUT
VP
VCC
DO
GND
Xfin
φP
LD/fout
ZC
PS
LE
Data
OSC
IN φR
fin Clock
1
2
3
4
5
678 9
10
11
12
13
141516
TOP
VIEW
(FPT-16P-M05)
(LCC-16P-M06)
16-pin SSOP
16-pad BCC
3
MB15E03SL
■
PIN DESCRIPTION
Pin No.
Pin
Name
I/O Descriptions
SSOP-16 BCC-16
116OSC
IN I
Programmable reference divider input.
Oscillator input connection to a TCXO.
21OSC
OUT O Oscillator output.
32VP — Power supply voltage input for the charge pump.
43V
CC — Power supply voltage input.
54D
O O
Charge pump output.
Phase of the charge pump can be selected via programming of the FC bit.
6 5 GND — Ground.
76XfinI
Prescaler complementary input which should be grounded via a
capacitor.
87finI
Prescaler input.
Connection to an external VCO should be done via AC coupling.
98ClockI
Clock input for the 19-bit shift register.
Data is shifted into the shift register on the rising edge of the clock.
(Open is prohibited.)
10 9 Data I
Serial data input using binary code.
The last bit of the data is a control bit. (Open is prohibited.)
11 10 LE I
Load enable signal input. (Open is prohibited.)
When LE is set high, the data in the shift register is transferred to a latch
according to the control bit in the serial data.
12 11 PS I
Power saving mode control. This pin must be set at “L” at Power-ON.
(Open is prohibited.)
PS = “H”; Normal mode
PS = “L”; Power saving mode
13 12 ZC I
Forced high-impedance control for the charge pump (with internal pull up
resistor.)
ZC = “H”; Normal Do output.
ZC = “L”; Do becomes high impedance.
14 13 LD/fout O
Lock detect signal output (LD)/phase comparator monitoring output (fout).
The output signal is selected via programming of the LDS bit.
LDS = “H”; outputs fout (fr/fp monitoring output)
LDS = “L”; outputs LD (“H” at locking, “L” at unlocking.)
15 14 φPO
Phase comparator N-channel open drain output for an external charge
pump. Phase can be selected via programming of the FC bit.
16 15 φRO
Phase comparator CMOS output for an external charge pump. Phase can
be selected via programming of the FC bit.
4
MB15E03SL
■
BLOCK DIAGRAM
Clock
Data
fin
LE
OSC
OUT
OSCIN
Reference
oscillator
circuit
Phase
comparator
Lock
detector
LD/fr/fp
selector
Binary 14-bit
reference
counter
Binary 7-bit
swallow
counter
Binary 11-bit
programmable
counter
14-bit latch 4-bit latch
19-bit shift register
Intermittent mode
control
(power save)
1-bit
cotrol
latch
Prescaler
64 / 65,
128 / 129
7-bit latch
Charge pump
Current switch
11-bit latch
PS
D
O
VP
φR
LD/fout
φP
Xfin
GND
V
CC
MD
ZC
C
N
T
SW FC CS
LDS
fr
fp
(16)
(1)
(2)
(3)
(4)
(5)
(6)
(7)
(15)
(14)
(13)
(12)
(11)
(10)
(9)
(8)
16
15
14
13
12
11
10
98
: SSOP
( ): BCC
7
6
5
4
3
2
1
5
MB15E03SL
■
ABSOLUTE MAXIMUM RATINGS
WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current,
temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings.
■
RECOMMENDED OPERATING CONDITIONS
WARNING: The recommended operating conditions are required in order to ensure the normal operation of the
semiconductor device. All of the device’s electrical characteristics are warranted when the device is
operated within these ranges.
Always use semiconductor devices within their recommended operating condition ranges. Operation
outside these ranges may adversely affect reliability and could result in device failure.
No warranty is made with respect to uses, operating conditions, or combinations not represented on
the data sheet. Users considering application outside the listed conditions are advised to contact their
FUJITSU representatives beforehand.
Parameter Symbol Condition
Rating
Unit Remark
Min. Max.
Power supply voltage
V
CC — –0.5 4.0 V
V
P —VCC 6.0 V
Input voltage V
I — –0.5 VCC +0.5 V
Output voltage
V
O Except Do GND VCC V
VO Do GND VP V
Storage temperature Tstg — –55 +125 °C
Parameter Symbol
Value
Unit Remark
Min. Typ. Max.
Power supply voltage
V
CC 2.4 3.0 3.6 V
VP VCC —5.5V
Input voltage V
I GND — VCC V
Operating temperature Ta –40 — +85 °C
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资源评论
- lwt2312013-04-28不错对我的学习有一定的帮助,谢谢楼主进行分享!
- Call_Me_Five2014-02-07很好的资料,是英文版的
xiezilinieying
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