System-on-a-Chip www.mentor.com/soc
Despite all the hoopla today,
the concept of System-on-a-Chip
(SoC) is nothing new. Since the
1970s, silicon and design automation tech-
nology has facilitated the integration of
more and more functionality onto a single
piece of silicon. However, with each
advancement in silicon technology and avail-
able transistors on a single die, new design
challenges emerge.
As available transistors now exceed
those required for most complete electronic
systems, the challenges associated with
accessing this near limitless capacity are sig-
nificant. Pre-existing content (i.e., IP), such as
microprocessors, DSPs, memories, and other
functions, is now an essential component
in design success. With on-
board programmable
elements, embedded
software design
becomes an ele-
ment in the IC design
process. Therefore, a new
facet of IC design not addressed by tradition-
al design methodologies is the debugging of
embedded software.
The combination of large, complex IP
blocks and embedded software, combined
with soaring transistor count, tax the capa-
bilities of traditional IC design methodology.
Thus, the unique demands of SoC develop-
ment are precipitating a fundamental shift in
IC design. The traditional content-based IC
design approach is focused on creating origi-
nal design content and verifying it.
By contrast, a new composition-based
approach shifts the focus from content cre-
ation to the problems of evaluating, integrat-
ing, and verifying multiple pre-existing blocks
and software components. This methodology
is characterized by more in-depth system-level
design, concurrent hardware/software design
and verification, verification at all levels of
the design process, and prudent use of exter-
nal design consulting services.
Mentor Graphics provides tools for the whole SoC design.
Both hardware and software IP is available — with
Inventra
™
IP Cores and the VRTXoc Real-Time Executive
— allowing for maximum reuse. Mentor also offers both
hardware and software design and development tools: the
ModelSim
™
VHDL and Verilog simulators and the
industry-standard XRAY
®
Debugger. All of these can be
linked using the Seamless
™
co-verification environment
™
to
provide a virtual system-on-a-chip design environment for
both hardware and software designers.
