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cc1101

学习资料

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**CC1101学习资料概述** CC1101是一款由Texas Instruments（TI）公司推出的超低功耗、高性能的无线收发器芯片。它主要用于ISM（工业、科学、医学）和SRD（短距离设备）频段的无线通信应用，如智能家居、无线传感器网络和远程控制等领域。这份学习资料提供了对CC1101芯片的全面理解，包括中文版和英文版的详细解释，以及一些源代码实例，非常适合初学者和进阶者进行深入研究。 **CC1101芯片特性** 1. **频率范围**: CC1101支持从315MHz到1020MHz的宽频率范围，可以根据不同国家和地区的法规进行调整。 2. **高灵敏度**: 芯片具有-110dBm的接收灵敏度，能够确保在低功率下实现远距离通信。 3. **低功耗**: 设计有多种工作模式，如待机、接收和发射，以适应不同应用场景的节能需求。 4. **GFSK调制**: 支持Gaussian Frequency Shift Keying (GFSK)调制方式，能有效提高信号质量并减少干扰。 5. **灵活配置**: 用户可以通过SPI接口对CC1101进行编程，以配置不同的工作参数，如频率、数据速率、调制方式等。 6. **内置匹配网络**: 内置的匹配网络简化了射频前端的设计，减少了外部元件的需求。 **学习资料内容** 这份资料可能包含以下部分： 1. **中文版技术手册**: 对CC1101的内部结构、工作原理、操作模式、寄存器配置等方面进行详细介绍，便于理解和应用。 2. **英文版参考手册**: 提供原始的英文资料，对于想要深入研究或者需要查阅官方最新信息的读者非常有用。 3. **源代码示例**: 包括初始化设置、数据传输、错误处理等方面的代码，有助于读者快速上手实践。 4. **应用笔记**: 可能包含关于如何设计和优化基于CC1101系统的建议和技巧。 **学习路径** 1. **熟悉芯片功能**: 首先阅读中文版技术手册，了解CC1101的基本特性和工作流程。 2. **深入研究**: 结合英文版手册，深入理解芯片的内部机制和高级特性。 3. **实践操作**: 分析和运行源代码，理解代码逻辑并尝试修改以适应自己的项目需求。 4. **应用调试**: 在实际硬件平台上测试和调试，解决可能出现的问题。 5. **性能优化**: 根据应用笔记和自己的经验，优化系统性能，如提高传输距离、降低功耗等。通过这些学习资料，你可以系统地掌握CC1101的使用，并具备开发基于该芯片的无线通信系统的能力。无论是初学者还是有一定经验的工程师，都能从中受益匪浅。在实践中不断探索和积累，将有助于你在无线通信领域取得更大的成就。

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cc1101学习资料（125个子文件）

1100 32KB

1100 31KB

1100 30KB

1100 29KB

1100 28KB

1100 27KB

1100 26KB

1100_Opt.Bak 1019B

1100_Opt.Bak 1018B

1100_Opt.Bak 1017B

1100_Opt.Bak 1008B

1100_Uv2.Bak 0B

1100.c 27KB

1100.c 25KB

1100.c 23KB

1100.c 22KB

1100.hex 6KB

1100.hex 5KB

1100.hex 4KB

1100.LST 46KB

1100.LST 41KB

1100.LST 40KB

1100.LST 36KB

1100.LST 34KB

1100.LST 33KB

1100.M51 28KB

1100.M51 26KB

1100.M51 24KB

1100.M51 23KB

1100.M51 22KB

1100.M51 21KB

1100.M51 20KB

1100.OBJ 36KB

1100.OBJ 35KB

1100.OBJ 33KB

1100.OBJ 32KB

1100.OBJ 31KB

1100.OBJ 30KB

1100.OBJ 29KB

1100.OBJ 28KB

1100.Opt 1019B

1100.Opt 1018B

1100.Opt 1017B

1100.Opt 1015B

1100.Opt 1014B

XL1101-D01-外框.PCB 47KB

语音CC1100.pdf 1.8MB

cc1101中文.pdf 1.45MB

cc1100.pdf 1.16MB

CC1100-430.pdf 486KB

XL1101-D02-V1.1.pdf 251KB

XL1101-D01-V1.1.pdf 237KB

wake on radio.pdf 231KB

GDO0使用.pdf 219KB

XL1101-D01-51原理图.pdf 33KB

共 125 条

Application Note

Application NoteApplication Note

Application Note

AN069

SWRA237 Page 1 of 16

AN069

Low Cost, Long Range One Way Audio

Communications at 900 MHz

By Michael Burns

Keywords

• CC1101

• CC1150

• Audio

• MSP430

• Frequency Diversity

• Forward Error Correction (FEC)

• FCC 15.247 Compliance

Introduction

This design implements a one way audio

link, based on the Texas Instruments

CC1150 (transmit only), CC1101

(transmit/receive), and the MSP430F2232

microcontroller. The system consists of a

‘transmitter’ card and a ‘receiver’ card, and

operates in the 900 MHz band (868 – 928

MHz). A power amplifier is included on the

transmitter card, to increase the power

output to +20 dBm while maintaining

acceptable harmonic suppression. The

receiver card contains a Low Noise

Amplifier to increase the receiver

sensitivity. Reliable communications is

maintained over a range in excess of 600

feet (180 meters) in ‘line of sight’

environments (non frequency diversity

applications).

The goals for this design were low cost,

and long range. To this end, an external

CODEC (COder-DECoder) is not used.

The MSP430F2232s 10 bit ADC is used to

sample audio data and Timer A is used in

PWM (Pulse Width Modulation) mode to

recover the audio from the digital data.

Audio data is sent in ‘packets’; that is, 36

(‘single Tx’ mode) or 44 (‘double Tx’

mode) ADC samples are collected and

sent in a single packet every 4.5 (‘single

Tx’ mode) or 5.5 (‘double Tx’ mode)

msecs.

Two transmission techniques will be

described. In ‘single Tx’ mode, each

packet is sent only once. In ‘double Tx’

mode, each packet is sent twice, at two

different frequencies. ‘Single Tx’ mode

allows for the use of a lower data rate (150

kbps) or for the use of Forward Error

Correction (FEC) at a higher data rate

(300 kbps). It is also possible to increase

the audio sample rate from 8 kHz to 12

kHz in ‘single Tx’ mode. ‘Double Tx’ offers

increased robustness, but requires the use

of a higher data rate (300 kbps) and

reduced output power due to FCC 15.247

restrictions.

Application Note

Application NoteApplication Note

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AN069

SWRA237 Page 2 of 16

Figure 1 – Transmitter

Figure 2 - Receiver

Application Note

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AN069

SWRA237 Page 3 of 16

Hardware Description - Transmitter

A CC1150 low power RF transmitter is used, along with a discrete power amplifier using a

BFP450 NPN silicon RF transistor and a BCR400W Active Bias Controller. This amplifier is

capable of producing up to +20 dBm of output power while maintaining harmonic levels more

than 50 dB lower than the fundamental. The microcontroller is a MSP430F2232, operating at

16.384 MHz. The MSP430F2232 includes a built-in 10 bit ADC. The audio path includes a

Programmable Gain Amplifier with gains of 10, 20, 40, and 80, followed by a six pole

Chebychev low pass filter with a cutoff frequency of 3 KHz. Five LEDs are contained on the

card, including a ‘heartbeat’ indicator, along with ‘Locate’ and ‘Cancel Locate’ buttons.

Refer to schematic, Figure 12.

Hardware Description - Receiver

A CC1101 low power RF transceiver is used, along with a discrete low noise RF amplifier

using a BGA2011 NPN RF transistor. A MSP430F2232 microcontroller operating at 16.384

MHz is used. The MSP430F2232 is capable of producing a Pulse Width Modulated audio

signal using a built in timer, eliminating the requirement of an external DAC. This PWM timer

is driven at the full MCU clock frequency (16.384 MHz), twice that required to convert the 10

bit ADC samples into pulses of the required length. This doubles the frequency of the idle tone

from 8 kHz to 16 kHz, making it much easier to remove it from the audio via filtering. The

audio path includes a six pole Chebychev low pass filter with a cut-off frequency of 3 KHz and

a TPA2001D1 One Watt Filter-less Mono Class-D Audio Power Amplifier. A five LED ‘bar

graph’ level indicator is included, along with ‘increase volume’ and ‘decrease volume’ push

buttons. This card can be powered by three 1.2 volt NiCad batteries or 3 AA alkaline batteries.

Battery voltage is monitored using the 10 Bit ADC built into the MSP430F2232. A blue

‘heartbeat’ LED, an orange ‘packet error’ LED, and a red ‘low battery’ LED are also included.

Included on both the transmitter and receiver cards is a 2 wire UART interface, intended to

drive a separate 4 line by 20 character LCD display card. This display provides status

information such as RSSI (Received Signal Strength), and the number of packet errors and

lost packets that have occurred.

Refer to schematic, Figure 13.

Software Description – Single Tx mode

Transmitter

Audio is sampled via the MSP430F2232’s 10 bit ADC at an 8 kHz rate (i.e., every 125 usec).

Every 36 ADC samples (4.5 msec), the 36 ten bit audio samples are packed into 45 bytes,

which, together with a status byte, are transmitted to the receiver. One bit of the ‘status’ byte is

used to signal to the receiver to sound the ‘locate’ tone. The ‘locate’ tone is described in the

‘Receiver’ section, below. Since it takes more than 125 usec to pack the data, two buffers are

required; the ‘active’ buffer is used to hold sampled ADC values in ‘real time’, while TX buffer

data is being built from the ‘inactive’ buffer.

Refer to Figure 3, below. ‘GDO0’ is an internally generated signal available at pin 2 of the

CC1150. GDO0 goes high following the transmission of the SYNC bytes, and goes low

following the transmission of the CRC bytes. ‘TX ON’ is generated in software. ‘TX ON’ goes

high when the transmitter is enabled and goes low simultaneously with GDO0.

Application Note

Application NoteApplication Note

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AN069

SWRA237 Page 4 of 16

340 usec

1493 usec

2667 usec

4160 usec

TX GDO0

TX ON

4500 usec

Figure 3 – Transmitter Timing (150 kbps, FEC disabled)

Note that there is a 1493 usec delay from the time that the transmitter is turned on until the

SYNC word has been sent; approximately 810 usec of this is taken up by the PLL calibration

procedure, which is performed prior to every transmission. The preamble and sync bytes take

427 usec to transmit.

Receiver

Data received from the transmitter is ‘played back’ at the same rate at which it was sampled,

i.e., 8 kHz. A data packet is expected every 4.5 milliseconds, which must be unpacked (five

bytes into four 10 bit values). The MSP430F2232’s ‘Timer A’ is used to convert 10 bit audio

samples to PWM (Pulse Width Modulated) signals. Again, it takes much longer than 125 usec

to ‘unpack’ the audio data, so two buffers are required. The receiver must also recognize

when the ‘locate’ button is activated on the Monitor, and substitute a 444 Hz tone pattern for

the ADC sample data. A frequency of 444.4 Hz was chosen because an integer number of

cycles (2) fit into 36 samples.

RX ON

750 - 900 usec

3600 - 3750 usec

1833 usec

2667 usec

TX GDO0

375

750 1125

1500

1875

2250

2625 3000 3375 3750 4125 0

Frame Timer

Sync Time Out

2750 usec

PLL Calibrate

(Packet Received)

721 usec

PLL Calibrate

(No SYNC)

721 usec

Figure 4 – Receiver Timing (‘Paired’ Mode, 150 kbps)

The receiver operates in two modes: ‘paired’ and ‘waiting for beacon’. In ‘waiting for beacon’

mode, the receiver is tuned to the first entry in the ‘frequency hopping’ table, the PLL

calibrated (using automatic calibration mode), and turned on for a maximum period of 125

msec. Once the beacon is detected, the mode is changed to ‘paired’. If the beacon is not

detected in the 125 msec period, the PLL is recalibrated and the process repeated indefinitely.

In ‘paired’ mode, Timer B of the MSP430F2232 is used as a ‘frame timer’. It is reset and

started once a packet is received (GDO0 goes low), and will automatically reset after 4500

Application Note

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AN069

SWRA237 Page 5 of 16

usec. The receiver is tuned to the next channel and PLL calibration initiated immediately

following the reception of a ‘good’ packet. If a packet is successfully received, the data is

unpacked and transferred to the inactive audio data buffer. If a packet is ‘lost’ or contains

errors, the inactive buffer is marked as ‘unusable’ - essentially, all values in the buffer are

replaced with ‘zeros’ during playback. This will mute the audio for 4.5 msec.

In the diagram above, note that the receiver will not be turned on until calibration is complete,

and until the frame timer has reached a value of between 750 and 900 usec (relative to the

end of the last successfully received packet). If SYNC word is not detected once the frame

timer has reached a value of 2750 usec, the receiver is turned off, any data in the receiver’s

FIFO buffer flushed, the receiver is tuned to the next channel, and PLL calibration initiated.

Software Description – Double Tx mode

Transmitter

As in single TX mode, audio is sampled via the MSP430F2232’s 10 bit ADC at an 8 kHz rate

(i.e., every 125 usec). Every 44 ADC samples (5.5 msec), the 44 ten bit audio samples are

packed into 55 bytes, and moved into a TX buffer, e.g. Tx Buffer A. The transmitter is tuned to

the current channel, and data is transmitted from both Tx Buffer A and Tx Buffer B. The

‘current channel’ index is then incremented, so that the next transmission will take place on a

different frequency. During transmission, ADC samples will continue to be collected and

placed in Tx Buffer B. Thus, every ADC sample will be transmitted twice, at two different

frequencies.

1320 usec 1900 usec

TX GDO0

TX ON

5500 usec

1900 usec

380 usec

1620 usec

1610 usec 1610 usec690 usec

300 usec

Transfer Data

from MSP430 to

CC1150 TX FIFO

380 usec

Transmit Buffer A Transmit Buffer B

380 usec

720 usec

220 usec

Calibrate PLL

750 usec570 usec

Figure 5 – Transmitter Timing, (300 kbps, double TX)

Note that 380 usec is required to transfer data form the MSP430s RAM into the CC1150s TX

FIFO. However, this time is ‘hidden’, in that the transfer is done simultaneously with PLL

calibration (750 usec).

Receiver

Two data packets are expected every 5.5 milliseconds. The first packet to be received in the

5.5 millisecond time slot (‘Packet A’) is the second transmission of the previous ADC samples

(i.e. Transmit Buffer A). The second packet is the first transmission of the current ADC

samples (i.e. Transmit Buffer B). Once both transmissions of a packet are received, a

decision is made as to which transmission is to be used for playback, based upon the status

of each packet. A packet is not considered to be ‘lost’ unless both transmissions of the packet

were lost (no SYNC word was detected). Similarly, a packet error is considered to have

occurred only if both transmissions of the packet contained errors or if only one packet was

received and it contained a packet error. Packet errors include CRC (Cyclic Redundancy

Check), and address or packet length mismatch.

评论收藏

内容反馈

zojn888

2014-01-20

资料很齐全，还带几个参考程序。适合新手。
zhangm1983

2013-04-02

非常好，正在找射频知识。
wxwj97

2015-09-25

不错，对使用c1101有帮助。
liumuyi1988

2014-05-13

正在学这方面的，不错啊
lfx10064098

2014-09-08

当年学习CC1101时用到了，还不错，值得参考

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