################################################################################
# Vivado (TM) v2020.2 (64-bit)
#
# README.txt: Please read the sections below to understand the steps required
# to simulate the design for a simulator, the directory structure
# and the generated exported files.
#
################################################################################
1. Simulate Design
To simulate design, cd to the simulator directory and execute the script.
For example:-
% cd questa
% ./top.sh
The export simulation flow requires the Xilinx pre-compiled simulation library
components for the target simulator. These components are referred using the
'-lib_map_path' switch. If this switch is specified, then the export simulation
will automatically set this library path in the generated script and update,
copy the simulator setup file(s) in the exported directory.
If '-lib_map_path' is not specified, then the pre-compiled simulation library
information will not be included in the exported scripts and that may cause
simulation errors when running this script. Alternatively, you can provide the
library information using this switch while executing the generated script.
For example:-
% ./top.sh -lib_map_path /design/questa/clibs
Please refer to the generated script header 'Prerequisite' section for more details.
2. Directory Structure
By default, if the -directory switch is not specified, export_simulation will
create the following directory structure:-
<current_working_directory>/export_sim/<simulator>
For example, if the current working directory is /tmp/test, export_simulation
will create the following directory path:-
/tmp/test/export_sim/questa
If -directory switch is specified, export_simulation will create a simulator
sub-directory under the specified directory path.
For example, 'export_simulation -directory /tmp/test/my_test_area/func_sim'
command will create the following directory:-
/tmp/test/my_test_area/func_sim/questa
By default, if -simulator is not specified, export_simulation will create a
simulator sub-directory for each simulator and export the files for each simulator
in this sub-directory respectively.
IMPORTANT: Please note that the simulation library path must be specified manually
in the generated script for the respective simulator. Please refer to the generated
script header 'Prerequisite' section for more details.
3. Exported script and files
Export simulation will create the driver shell script, setup files and copy the
design sources in the output directory path.
By default, when the -script_name switch is not specified, export_simulation will
create the following script name:-
<simulation_top>.sh (Unix)
When exporting the files for an IP using the -of_objects switch, export_simulation
will create the following script name:-
<ip-name>.sh (Unix)
Export simulation will create the setup files for the target simulator specified
with the -simulator switch.
For example, if the target simulator is "ies", export_simulation will create the
'cds.lib', 'hdl.var' and design library diectories and mappings in the 'cds.lib'
file.
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基于FPGA的OFDM基带发射机-代码
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基于FPGA的OFDM基带发射机-代码 (435个子文件)
_info 11KB
_info 154B
_info 154B
_vmake 29B
xsim.ini.bak 30KB
elaborate.bat 2KB
compile.bat 1KB
simulate.bat 945B
simulate.bat 832B
compile.bat 826B
xsim_5.c 309KB
xsim_1.c 36KB
xsim.dbg 94KB
Byte_To_Bit.dcp 75KB
compile.do 4KB
compile.do 3KB
compile.do 3KB
compile.do 3KB
OFDM_Tx_tb_compile.do 3KB
OFDM_Tx_tb_wave.do 1KB
compile.do 1KB
compile.do 1KB
compile.do 1015B
compile.do 1015B
compile.do 982B
compile.do 982B
compile.do 968B
compile.do 968B
OFDM_Tx_tb_simulate.do 967B
compile.do 743B
compile.do 719B
compile.do 687B
compile.do 677B
simulate.do 626B
simulate.do 618B
simulate.do 618B
elaborate.do 505B
simulate.do 346B
simulate.do 346B
simulate.do 346B
simulate.do 346B
simulate.do 344B
simulate.do 344B
simulate.do 304B
simulate.do 299B
simulate.do 299B
elaborate.do 223B
elaborate.do 223B
simulate.do 202B
simulate.do 202B
simulate.do 188B
elaborate.do 183B
simulate.do 182B
wave.do 32B
wave.do 32B
wave.do 32B
wave.do 32B
wave.do 32B
wave.do 32B
wave.do 32B
wave.do 32B
wave.do 32B
wave.do 32B
wave.do 32B
wave.do 32B
wave.do 32B
wave.do 32B
wave.do 32B
wave.do 32B
simulate.do 11B
simulate.do 11B
simulate.do 11B
simulate.do 11B
xsimk.exe 2.59MB
run.f 2KB
run.f 2KB
run.f 828B
run.f 828B
run.f 800B
run.f 800B
run.f 541B
run.f 525B
hw_ila_data_1.ila 182KB
.xsim_webtallk.info 65B
modelsim.ini 69KB
xsim.ini 30KB
xsim.ini 29KB
xsim.ini 29KB
xsim.ini 29KB
xsim.ini 29KB
xsimSettings.ini 1KB
webtalk_10728.backup.jou 950B
webtalk.jou 950B
webtalk_10620.backup.jou 950B
hw_ila_1.layout 229KB
simulate.log 52KB
elaborate.log 23KB
xvlog.log 5KB
compile.log 4KB
webtalk_10620.backup.log 1019B
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